From: Stephen Boyd <sboyd@kernel.org>
To: Catalin Popescu <catalin.popescu@leica-geosystems.com>,
biju.das.jz@bp.renesas.com, marek.vasut+renesas@mailbox.org,
marex@denx.de, mturquette@baylibre.com
Cc: linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
bsp-development.geo@leica-geosystems.com,
m.felsch@pengutronix.de,
Catalin Popescu <catalin.popescu@leica-geosystems.com>
Subject: Re: [PATCH] clk: rs9: fix wrong default value for clock amplitude
Date: Fri, 19 Apr 2024 19:10:07 -0700 [thread overview]
Message-ID: <4764d988a07ec3defb56f98190427a7b.sboyd@kernel.org> (raw)
In-Reply-To: <20240415140348.2887619-1-catalin.popescu@leica-geosystems.com>
Quoting Catalin Popescu (2024-04-15 07:03:48)
> According to 9FGV0241, 9FGV0441 & 9FGV0841 datasheets, the default
> value for the clock amplitude is 0.8V, while the driver assumes 0.7V.
>
> Additionally, define constants for default values for both clock
> amplitude and spread spectrum and use them.
>
> Fixes: 892e0ddea1aa ("clk: rs9: Add Renesas 9-series PCIe clock generator driver")
>
> Signed-off-by: Catalin Popescu <catalin.popescu@leica-geosystems.com>
> Reviewed-by: Marek Vasut <marex@denx.de>
> ---
Applied to clk-next
next prev parent reply other threads:[~2024-04-20 2:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-15 14:03 [PATCH] clk: rs9: fix wrong default value for clock amplitude Catalin Popescu
2024-04-15 14:04 ` POPESCU Catalin
2024-04-20 2:10 ` Stephen Boyd [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-04-15 12:42 Catalin Popescu
2024-04-15 12:44 ` POPESCU Catalin
2024-04-15 13:24 ` Marek Vasut
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