* [PATCH v3 0/2] caam: init-clk based on caam-page0-access @ 2024-04-16 5:33 Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 1/2] " Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access Pankaj Gupta 0 siblings, 2 replies; 7+ messages in thread From: Pankaj Gupta @ 2024-04-16 5:33 UTC (permalink / raw To: gaurav.jain, horia.geanta, V.Sethi, herbert, davem, iuliana.prodan, linux-crypto, linux-kernel, linux-imx Cc: Pankaj Gupta v3: - Splitting the patch into two. - Disposed-off comments received on v2. v2: - Considering the OPTEE enablement check too, for setting the variable 'reg_access'. Pankaj Gupta (2): caam: init-clk based on caam-page0-access drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access drivers/crypto/caam/ctrl.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 1/2] caam: init-clk based on caam-page0-access 2024-04-16 5:33 [PATCH v3 0/2] caam: init-clk based on caam-page0-access Pankaj Gupta @ 2024-04-16 5:33 ` Pankaj Gupta 2024-04-18 14:49 ` Horia Geanta 2024-05-13 6:09 ` Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access Pankaj Gupta 1 sibling, 2 replies; 7+ messages in thread From: Pankaj Gupta @ 2024-04-16 5:33 UTC (permalink / raw To: gaurav.jain, horia.geanta, V.Sethi, herbert, davem, iuliana.prodan, linux-crypto, linux-kernel, linux-imx Cc: Pankaj Gupta CAAM clock initializat is done based on the basis of soc specific info stored in struct caam_imx_data: - caam-page0-access flag - num_clks CAAM driver needs to be aware of access rights to CAAM control page i.e., page0, to do things differently. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> --- drivers/crypto/caam/ctrl.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index bdf367f3f679..247d42aa32df 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -512,6 +512,7 @@ static const struct of_device_id caam_match[] = { MODULE_DEVICE_TABLE(of, caam_match); struct caam_imx_data { + bool page0_access; const struct clk_bulk_data *clks; int num_clks; }; @@ -524,6 +525,7 @@ static const struct clk_bulk_data caam_imx6_clks[] = { }; static const struct caam_imx_data caam_imx6_data = { + .page0_access = true, .clks = caam_imx6_clks, .num_clks = ARRAY_SIZE(caam_imx6_clks), }; @@ -534,6 +536,7 @@ static const struct clk_bulk_data caam_imx7_clks[] = { }; static const struct caam_imx_data caam_imx7_data = { + .page0_access = true, .clks = caam_imx7_clks, .num_clks = ARRAY_SIZE(caam_imx7_clks), }; @@ -545,6 +548,7 @@ static const struct clk_bulk_data caam_imx6ul_clks[] = { }; static const struct caam_imx_data caam_imx6ul_data = { + .page0_access = true, .clks = caam_imx6ul_clks, .num_clks = ARRAY_SIZE(caam_imx6ul_clks), }; @@ -554,6 +558,7 @@ static const struct clk_bulk_data caam_vf610_clks[] = { }; static const struct caam_imx_data caam_vf610_data = { + .page0_access = true, .clks = caam_vf610_clks, .num_clks = ARRAY_SIZE(caam_vf610_clks), }; @@ -860,6 +865,7 @@ static int caam_probe(struct platform_device *pdev) int pg_size; int BLOCK_OFFSET = 0; bool reg_access = true; + const struct caam_imx_data *imx_soc_data; ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL); if (!ctrlpriv) @@ -889,17 +895,25 @@ static int caam_probe(struct platform_device *pdev) reg_access = !ctrlpriv->optee_en; - if (!imx_soc_match->data) { + if (imx_soc_match->data) { dev_err(dev, "No clock data provided for i.MX SoC"); return -EINVAL; } + imx_soc_data = imx_soc_match->data; + reg_access = reg_access && imx_soc_data->page0_access; + /* + * CAAM clocks cannot be controlled from kernel. + */ + if (!imx_soc_data->num_clks) + goto iomap_ctrl; + ret = init_clocks(dev, imx_soc_match->data); if (ret) return ret; } - +iomap_ctrl: /* Get configuration properties from device tree */ /* First, get register page */ ctrl = devm_of_iomap(dev, nprop, 0, NULL); -- 2.34.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 1/2] caam: init-clk based on caam-page0-access 2024-04-16 5:33 ` [PATCH v3 1/2] " Pankaj Gupta @ 2024-04-18 14:49 ` Horia Geanta 2024-04-19 5:29 ` Pankaj Gupta 2024-05-13 6:09 ` Pankaj Gupta 1 sibling, 1 reply; 7+ messages in thread From: Horia Geanta @ 2024-04-18 14:49 UTC (permalink / raw To: Pankaj Gupta, Gaurav Jain, Varun Sethi, herbert@gondor.apana.org.au, davem@davemloft.net, Iuliana Prodan, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, dl-linux-imx On 4/16/2024 8:35 AM, Pankaj Gupta wrote: > CAAM clock initializat is done based on the basis of soc specific ^ initialization > @@ -889,17 +895,25 @@ static int caam_probe(struct platform_device *pdev) > > reg_access = !ctrlpriv->optee_en; > > - if (!imx_soc_match->data) { > + if (imx_soc_match->data) { This is obviously incorrect. > dev_err(dev, "No clock data provided for i.MX SoC"); > return -EINVAL; > } Regards, Horia ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH v3 1/2] caam: init-clk based on caam-page0-access 2024-04-18 14:49 ` Horia Geanta @ 2024-04-19 5:29 ` Pankaj Gupta 0 siblings, 0 replies; 7+ messages in thread From: Pankaj Gupta @ 2024-04-19 5:29 UTC (permalink / raw To: Horia Geanta, Gaurav Jain, Varun Sethi, herbert@gondor.apana.org.au, davem@davemloft.net, Iuliana Prodan, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, dl-linux-imx > -----Original Message----- > From: Horia Geanta <horia.geanta@nxp.com> > Sent: Thursday, April 18, 2024 8:20 PM > To: Pankaj Gupta <pankaj.gupta@nxp.com>; Gaurav Jain > <gaurav.jain@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > herbert@gondor.apana.org.au; davem@davemloft.net; Iuliana Prodan > <iuliana.prodan@nxp.com>; linux-crypto@vger.kernel.org; linux- > kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH v3 1/2] caam: init-clk based on caam-page0-access > > On 4/16/2024 8:35 AM, Pankaj Gupta wrote: > > CAAM clock initializat is done based on the basis of soc specific > ^ initialization > > > @@ -889,17 +895,25 @@ static int caam_probe(struct platform_device > *pdev) > > > > reg_access = !ctrlpriv->optee_en; > > > > - if (!imx_soc_match->data) { > > + if (imx_soc_match->data) { > This is obviously incorrect. [Accepted] > > > dev_err(dev, "No clock data provided for i.MX SoC"); > > return -EINVAL; > > } > > Regards, > Horia ^ permalink raw reply [flat|nested] 7+ messages in thread
* RE: [PATCH v3 1/2] caam: init-clk based on caam-page0-access 2024-04-16 5:33 ` [PATCH v3 1/2] " Pankaj Gupta 2024-04-18 14:49 ` Horia Geanta @ 2024-05-13 6:09 ` Pankaj Gupta 1 sibling, 0 replies; 7+ messages in thread From: Pankaj Gupta @ 2024-05-13 6:09 UTC (permalink / raw To: Gaurav Jain, Horia Geanta, Varun Sethi, herbert@gondor.apana.org.au, davem@davemloft.net, Iuliana Prodan, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, dl-linux-imx If there are no further comments, request Herbert to merge the patch-set. Regards Pankaj > -----Original Message----- > From: Pankaj Gupta > Sent: Tuesday, April 16, 2024 11:05 AM > To: Gaurav Jain <gaurav.jain@nxp.com>; Horia Geanta > <horia.geanta@nxp.com>; Varun Sethi <V.Sethi@nxp.com>; > herbert@gondor.apana.org.au; davem@davemloft.net; Iuliana Prodan > <iuliana.prodan@nxp.com>; linux-crypto@vger.kernel.org; linux- > kernel@vger.kernel.org; dl-linux-imx <linux-imx@nxp.com> > Cc: Pankaj Gupta <pankaj.gupta@nxp.com> > Subject: [PATCH v3 1/2] caam: init-clk based on caam-page0-access > > CAAM clock initializat is done based on the basis of soc specific info stored in > struct caam_imx_data: > - caam-page0-access flag > - num_clks > > CAAM driver needs to be aware of access rights to CAAM control page i.e., > page0, to do things differently. > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> > --- > drivers/crypto/caam/ctrl.c | 18 ++++++++++++++++-- > 1 file changed, 16 insertions(+), 2 deletions(-) > > diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index > bdf367f3f679..247d42aa32df 100644 > --- a/drivers/crypto/caam/ctrl.c > +++ b/drivers/crypto/caam/ctrl.c > @@ -512,6 +512,7 @@ static const struct of_device_id caam_match[] = > { MODULE_DEVICE_TABLE(of, caam_match); > > struct caam_imx_data { > + bool page0_access; > const struct clk_bulk_data *clks; > int num_clks; > }; > @@ -524,6 +525,7 @@ static const struct clk_bulk_data caam_imx6_clks[] = > { }; > > static const struct caam_imx_data caam_imx6_data = { > + .page0_access = true, > .clks = caam_imx6_clks, > .num_clks = ARRAY_SIZE(caam_imx6_clks), }; @@ -534,6 +536,7 @@ > static const struct clk_bulk_data caam_imx7_clks[] = { }; > > static const struct caam_imx_data caam_imx7_data = { > + .page0_access = true, > .clks = caam_imx7_clks, > .num_clks = ARRAY_SIZE(caam_imx7_clks), }; @@ -545,6 +548,7 @@ > static const struct clk_bulk_data caam_imx6ul_clks[] = { }; > > static const struct caam_imx_data caam_imx6ul_data = { > + .page0_access = true, > .clks = caam_imx6ul_clks, > .num_clks = ARRAY_SIZE(caam_imx6ul_clks), }; @@ -554,6 +558,7 > @@ static const struct clk_bulk_data caam_vf610_clks[] = { }; > > static const struct caam_imx_data caam_vf610_data = { > + .page0_access = true, > .clks = caam_vf610_clks, > .num_clks = ARRAY_SIZE(caam_vf610_clks), }; @@ -860,6 +865,7 > @@ static int caam_probe(struct platform_device *pdev) > int pg_size; > int BLOCK_OFFSET = 0; > bool reg_access = true; > + const struct caam_imx_data *imx_soc_data; > > ctrlpriv = devm_kzalloc(&pdev->dev, sizeof(*ctrlpriv), GFP_KERNEL); > if (!ctrlpriv) > @@ -889,17 +895,25 @@ static int caam_probe(struct platform_device > *pdev) > > reg_access = !ctrlpriv->optee_en; > > - if (!imx_soc_match->data) { > + if (imx_soc_match->data) { > dev_err(dev, "No clock data provided for i.MX SoC"); > return -EINVAL; > } > > + imx_soc_data = imx_soc_match->data; > + reg_access = reg_access && imx_soc_data->page0_access; > + /* > + * CAAM clocks cannot be controlled from kernel. > + */ > + if (!imx_soc_data->num_clks) > + goto iomap_ctrl; > + > ret = init_clocks(dev, imx_soc_match->data); > if (ret) > return ret; > } > > - > +iomap_ctrl: > /* Get configuration properties from device tree */ > /* First, get register page */ > ctrl = devm_of_iomap(dev, nprop, 0, NULL); > -- > 2.34.1 ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access 2024-04-16 5:33 [PATCH v3 0/2] caam: init-clk based on caam-page0-access Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 1/2] " Pankaj Gupta @ 2024-04-16 5:33 ` Pankaj Gupta 2024-04-18 14:53 ` Horia Geanta 1 sibling, 1 reply; 7+ messages in thread From: Pankaj Gupta @ 2024-04-16 5:33 UTC (permalink / raw To: gaurav.jain, horia.geanta, V.Sethi, herbert, davem, iuliana.prodan, linux-crypto, linux-kernel, linux-imx Cc: Pankaj Gupta iMX8ULP have a secure-enclave hardware IP called EdgeLock Enclave(ELE), that control access to caam controller's register page, i.e., page0. At all, if the ELE release access to CAAM controller's register page, it will release to secure-world only. Clocks are turned on automatically for iMX8ULP. There exists the caam clock gating bit, but it is not advised to gate the clock at linux, as optee-os or any other entity might be using it. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> --- drivers/crypto/caam/ctrl.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c index 247d42aa32df..f0f87fe8ef92 100644 --- a/drivers/crypto/caam/ctrl.c +++ b/drivers/crypto/caam/ctrl.c @@ -563,11 +563,14 @@ static const struct caam_imx_data caam_vf610_data = { .num_clks = ARRAY_SIZE(caam_vf610_clks), }; +static const struct caam_imx_data caam_imx8ulp_data; + static const struct soc_device_attribute caam_imx_soc_table[] = { { .soc_id = "i.MX6UL", .data = &caam_imx6ul_data }, { .soc_id = "i.MX6*", .data = &caam_imx6_data }, { .soc_id = "i.MX7*", .data = &caam_imx7_data }, { .soc_id = "i.MX8M*", .data = &caam_imx7_data }, + { .soc_id = "i.MX8ULP", .data = &caam_imx8ulp_data }, { .soc_id = "VF*", .data = &caam_vf610_data }, { .family = "Freescale i.MX" }, { /* sentinel */ } -- 2.34.1 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access 2024-04-16 5:33 ` [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access Pankaj Gupta @ 2024-04-18 14:53 ` Horia Geanta 0 siblings, 0 replies; 7+ messages in thread From: Horia Geanta @ 2024-04-18 14:53 UTC (permalink / raw To: Pankaj Gupta, Gaurav Jain, Varun Sethi, herbert@gondor.apana.org.au, davem@davemloft.net, Iuliana Prodan, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, dl-linux-imx On 4/16/2024 8:35 AM, Pankaj Gupta wrote: > iMX8ULP have a secure-enclave hardware IP called EdgeLock Enclave(ELE), > that control access to caam controller's register page, i.e., page0. > > At all, if the ELE release access to CAAM controller's register page, > it will release to secure-world only. > > Clocks are turned on automatically for iMX8ULP. There exists the caam > clock gating bit, but it is not advised to gate the clock at linux, as > optee-os or any other entity might be using it. > > Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Thanks, Horia ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2024-05-13 6:09 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-04-16 5:33 [PATCH v3 0/2] caam: init-clk based on caam-page0-access Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 1/2] " Pankaj Gupta 2024-04-18 14:49 ` Horia Geanta 2024-04-19 5:29 ` Pankaj Gupta 2024-05-13 6:09 ` Pankaj Gupta 2024-04-16 5:33 ` [PATCH v3 2/2] drivers: crypto: caam: i.MX8ULP donot have CAAM page0 access Pankaj Gupta 2024-04-18 14:53 ` Horia Geanta
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