Linux-CXL Archive mirror
 help / color / mirror / Atom feed
 messages from 2025-11-14 20:02:11 to 2025-11-21 00:20:22 UTC [more...]

[NDCTL PATCH v2 0/2] cxl: Add tests for extended linear cache support
 2025-11-21  0:20 UTC  (2+ messages)
` [NDCTL PATCH v2 1/2] cxl/test: Add test "

[PATCH v21 00/23] Type2 device basic support
 2025-11-20 20:27 UTC  (27+ messages)
` [PATCH v21 01/23] cxl/mem: refactor memdev allocation
` [PATCH v21 02/23] cxl/mem: Arrange for always-synchronous memdev attach
` [PATCH v21 03/23] cxl/port: Arrange for always synchronous endpoint attach
` [PATCH v21 04/23] cxl/mem: Introduce a memdev creation ->probe() operation
` [PATCH v21 05/23] cxl: Add type2 device basic support
` [PATCH v21 06/23] sfc: add cxl support
` [PATCH v21 07/23] cxl: Move pci generic code
` [PATCH v21 08/23] cxl/sfc: Map cxl component regs
` [PATCH v21 09/23] cxl/sfc: Initialize dpa without a mailbox
` [PATCH v21 10/23] cxl: Prepare memdev creation for type2
` [PATCH v21 11/23] sfc: create type2 cxl memdev
` [PATCH v21 12/23] cxl: Define a driver interface for HPA free space enumeration
` [PATCH v21 13/23] sfc: get root decoder
` [PATCH v21 14/23] cxl: Define a driver interface for DPA allocation
` [PATCH v21 15/23] sfc: get endpoint decoder
` [PATCH v21 16/23] cxl: Make region type based on endpoint type
` [PATCH v21 17/23] cxl/region: Factor out interleave ways setup
` [PATCH v21 18/23] cxl/region: Factor out interleave granularity setup
` [PATCH v21 19/23] cxl: Allow region creation by type2 drivers
` [PATCH v21 20/23] cxl: Avoid dax creation for accelerators
` [PATCH v21 21/23] sfc: create cxl region
` [PATCH v21 22/23] cxl: Add function for obtaining region range
` [PATCH v21 23/23] sfc: support pio mapping based on cxl

[PATCH v4 0/9] dax/hmem, cxl: Coordinate Soft Reserved handling with CXL and HMEM
 2025-11-20 20:21 UTC  (12+ messages)
` [PATCH v4 1/9] dax/hmem, e820, resource: Defer Soft Reserved insertion until hmem is ready
` [PATCH v4 2/9] dax/hmem: Request cxl_acpi and cxl_pci before walking Soft Reserved ranges
` [PATCH v4 3/9] dax/hmem: Gate Soft Reserved deferral on DEV_DAX_CXL
` [PATCH v4 4/9] dax/hmem: Defer handling of Soft Reserved ranges that overlap CXL windows
` [PATCH v4 5/9] cxl/region, dax/hmem: Arbitrate Soft Reserved ownership with cxl_regions_fully_map()
` [PATCH v4 6/9] cxl/region: Add register_dax flag to defer DAX setup
` [PATCH v4 7/9] cxl/region, dax/hmem: Register cxl_dax only when CXL owns Soft Reserved span
` [PATCH v4 8/9] cxl/region, dax/hmem: Tear down CXL regions when HMEM reclaims Soft Reserved
` [PATCH v4 9/9] dax/hmem: Reintroduce Soft Reserved ranges back into the iomem tree

[PATCH v3 0/5] dax: add PROBE_PREFER_ASYNCHRONOUS to all the dax drivers
 2025-11-20 17:11 UTC  (4+ messages)
` [PATCH v3 5/5] dax: add PROBE_PREFER_ASYNCHRONOUS to the dax device driver

Interest in contributing to the CXL community
 2025-11-20 15:07 UTC  (2+ messages)

[PATCH 00/44] Change a lot of min_t() that might mask high bits
 2025-11-20 14:52 UTC  (6+ messages)
` [PATCH 17/44] drivers/cxl: use min() instead of min_t()
` (subset) [PATCH 00/44] Change a lot of min_t() that might mask high bits

[PATCH v6 0/7] Cache coherency management subsystem
 2025-11-20  9:55 UTC  (15+ messages)
` [PATCH v6 1/7] memregion: Drop unused IORES_DESC_* parameter from cpu_cache_invalidate_memregion()
` [PATCH v6 2/7] memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion()
` [PATCH v6 3/7] lib: Support ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
` [PATCH v6 4/7] arm64: Select GENERIC_CPU_CACHE_MAINTENANCE
` [PATCH v6 5/7] MAINTAINERS: Add Jonathan Cameron to drivers/cache and add lib/cache_maint.c + header
` [PATCH v6 6/7] cache: Make top level Kconfig menu a boolean dependent on RISCV
` [PATCH v6 7/7] cache: Support cache maintenance for HiSilicon SoC Hydra Home Agent

[RESEND v13 00/25] Enable CXL PCIe Port Protocol Error handling and logging
 2025-11-20  3:33 UTC  (43+ messages)
` [RESEND v13 01/25] CXL/PCI: Move CXL DVSEC definitions into uapi/linux/pci_regs.h
` [RESEND v13 02/25] PCI/CXL: Introduce pcie_is_cxl()
` [RESEND v13 03/25] cxl/pci: Remove unnecessary CXL Endpoint handling helper functions
` [RESEND v13 04/25] cxl/pci: Remove unnecessary CXL RCH "
` [RESEND v13 05/25] cxl: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from core/pci.c
` [RESEND v13 06/25] cxl: Move CXL driver's RCH error handling into core/ras_rch.c
` [RESEND v13 07/25] CXL/AER: Replace device_lock() in cxl_rch_handle_error_iter() with guard() lock
` [RESEND v13 08/25] CXL/AER: Move AER drivers RCH error handling into pcie/aer_cxl_rch.c
` [RESEND v13 10/25] cxl/pci: Update RAS handler interfaces to also support CXL Ports
` [RESEND v13 11/25] cxl/pci: Log message if RAS registers are unmapped
` [RESEND v13 12/25] cxl/pci: Unify CXL trace logging for CXL Endpoints and CXL Ports
` [RESEND v13 13/25] cxl/pci: Update cxl_handle_cor_ras() to return early if no RAS errors
` [RESEND v13 15/25] CXL/PCI: Introduce PCI_ERS_RESULT_PANIC
` [RESEND v13 16/25] CXL/AER: Introduce pcie/aer_cxl_vh.c in AER driver for forwarding CXL errors
` [RESEND v13 17/25] cxl: Introduce cxl_pci_drv_bound() to check for bound driver
` [RESEND v13 21/25] PCI/AER: Dequeue forwarded CXL error
` [RESEND v13 25/25] CXL/PCI: Disable CXL protocol error interrupts during CXL Port cleanup

[cxl:next] BUILD SUCCESS ea5514e300568cbe8f19431c3e424d4791db8291
 2025-11-20  1:23 UTC 

[PATCH V4 00/17] Add CXL LSA 2.1 format support in nvdimm and cxl pmem
 2025-11-19 23:37 UTC  (33+ messages)
  ` [PATCH V4 01/17] nvdimm/label: Introduce NDD_REGION_LABELING flag to set region label
  ` [PATCH V4 02/17] nvdimm/label: CXL labels skip the need for 'interleave-set cookie'
  ` [PATCH V4 03/17] nvdimm/label: Add namespace/region label support as per LSA 2.1
  ` [PATCH V4 04/17] nvdimm/label: Include region label in slot validation
  ` [PATCH V4 05/17] nvdimm/label: Skip region label during ns label DPA reservation
  ` [PATCH V4 06/17] nvdimm/label: Preserve region label during namespace creation
  ` [PATCH V4 07/17] nvdimm/label: Add region label delete support
  ` [PATCH V4 08/17] nvdimm/label: Preserve cxl region information from region label
  ` [PATCH V4 09/17] nvdimm/label: Export routine to fetch region information
  ` [PATCH V4 10/17] cxl/mem: Refactor cxl pmem region auto-assembling
  ` [PATCH V4 11/17] cxl/region: Add devm_cxl_pmem_add_region() for pmem region creation
  ` [PATCH V4 12/17] cxl/pmem: Preserve region information into nd_set
  ` [PATCH V4 13/17] cxl/pmem_region: Prep patch to accommodate pmem_region attributes
  ` [PATCH V4 14/17] cxl/pmem_region: Introduce CONFIG_CXL_PMEM_REGION for core/pmem_region.c
  ` [PATCH V4 15/17] cxl/pmem_region: Add sysfs attribute cxl region label updation/deletion
  ` [PATCH V4 16/17] cxl/pmem_region: Create pmem region using information parsed from LSA
  ` [PATCH V4 17/17] cxl/pmem: Add CXL LSA 2.1 support in cxl pmem

[PATCH v20 00/22] Type2 device basic support
 2025-11-19 18:31 UTC  (19+ messages)
` [PATCH v20 04/22] cxl: Add type2 "
` [PATCH v20 06/22] cxl: Move pci generic code
` [PATCH v20 11/22] cxl: Define a driver interface for HPA free space enumeration
` [PATCH v20 18/22] cxl: Allow region creation by type2 drivers

[PATCH 0/4 v6] cxl/core: Enable Region creation/attach on x86 with LMH
 2025-11-19 11:08 UTC  (10+ messages)
` [PATCH 1/4 v6] cxl/core: Change match_*_by_range() signatures
` [PATCH 2/4 v6] cxl/core: Add helpers to detect Low Memory Holes on x86
` [PATCH 3/4 v6] cxl/core: Enable Region creation on x86 with LMH
` [PATCH 4/4 v6] cxl/test: Simulate an x86 Low Memory Hole for tests

[PATCH] cxl/test: Remove ret_limit race condition in mock_get_event()
 2025-11-18 23:35 UTC  (4+ messages)

[PATCH] cxl/test: Assign overflow_err_count from log->nr_overflow
 2025-11-18 23:34 UTC  (4+ messages)

[PATCH] cxl/test: remove unused function
 2025-11-18 22:49 UTC  (4+ messages)

[RFC LPC2026 PATCH v2 00/11] Specific Purpose Memory NUMA Nodes
 2025-11-18 10:36 UTC  (3+ messages)

[cxl:next] BUILD SUCCESS 7ec9db66cc552f2f8a6779c16d01a2a01eccedde
 2025-11-18  9:55 UTC 

[PATCH v2 0/3] cxl/test: Add unit testing for extended linear cache
 2025-11-17 18:13 UTC  (8+ messages)
` [PATCH v2 1/3] cxl/test: Standardize CXL auto region size
` [PATCH v2 2/3] cxl/test: Add cxl_test CFMWS support for extended linear cache
` [PATCH v2 3/3] cxl/test: Add support for acpi "

[PATCH v4 00/14] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
 2025-11-17 17:23 UTC  (4+ messages)

[RFC v2 PATCH 00/17] Initial CXL.cache device support
 2025-11-17 15:56 UTC  (3+ messages)
` [PATCH 01/17] cxl/port: Arrange for always synchronous endpoint attach

[PATCH v6 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
 2025-11-17 14:58 UTC  (3+ messages)

[PATCH v7 00/11] cxl: ACPI PRM Address Translation Support and AMD Zen5 enablement
 2025-11-17 13:57 UTC  (14+ messages)
` [PATCH v7 01/11] cxl/region: Rename misleading variable name @hpa to @hpa_range
` [PATCH v7 02/11] cxl/region: Store root decoder in struct cxl_region
` [PATCH v7 03/11] cxl/region: Store HPA range "
` [PATCH v7 04/11] cxl: Simplify cxl_root_ops allocation and handling
` [PATCH v7 05/11] cxl/region: Separate region parameter setup and region construction
` [PATCH v7 06/11] cxl/region: Add @hpa_range argument to function cxl_calc_interleave_pos()
` [PATCH v7 07/11] cxl/region: Use region data to get the root decoder
` [PATCH v7 08/11] cxl: Introduce callback for HPA address ranges translation
` [PATCH v7 09/11] cxl/acpi: Prepare use of EFI runtime services
` [PATCH v7 10/11] cxl: Enable AMD Zen5 address translation using ACPI PRMT
` [PATCH v7 11/11] cxl/atl: Lock decoders that need address translation

[NDCTL PATCH 0/5] cxl: Add tests for extended linear cache support
 2025-11-16  1:49 UTC  (10+ messages)
` [NDCTL PATCH 1/5] cxl/test: Add test "
` [NDCTL PATCH 2/5] cxl/test: Fix cxl-poison.sh to detect the correct elc sysfs attrib
` [NDCTL PATCH 3/5] cxl/test: Move cxl-poison.sh to use cxl_test auto region

[cxl:for-6.19/cxl-prm] BUILD SUCCESS 7e71fa6e015e46275efd900a728a42d5fcd75179
 2025-11-15 22:30 UTC 

[cxl:next-6.19-merge-prm-prep] BUILD SUCCESS 33bedb92d26b746f00269fd5d04aab74480d2a06
 2025-11-15 11:57 UTC 

[PATCH 0/4] cxl/test: Add unit testing for extended linear cache
 2025-11-15  3:01 UTC  (7+ messages)
` [PATCH 1/4] cxl/test: Standardize CXL auto region size
` [PATCH 2/4] cxl/test: Add cxl_test CFMWS support for extended linear cache
` [PATCH 3/4] cxl/test: Add support for acpi "

[ndctl PATCH v4] cxl: Add cxl-translate.sh unit test
 2025-11-15  0:50 UTC  (2+ messages)

[GIT PULL] Compute Express Link (CXL) Fixes for 6.18-rc6
 2025-11-14 21:42 UTC  (2+ messages)

[PATCH 0/3] CXL updates for v6.19
 2025-11-14 20:19 UTC  (2+ messages)


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).