From: Andy Chiu <andy.chiu@sifive.com>
To: "Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Conor Dooley" <conor.dooley@microchip.com>,
"Heiko Stuebner" <heiko@sntech.de>,
"Andy Chiu" <andy.chiu@sifive.com>, "Guo Ren" <guoren@kernel.org>,
"Conor Dooley" <conor@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Jonathan Corbet" <corbet@lwn.net>,
"Evan Green" <evan@rivosinc.com>,
"Clément Léger" <cleger@rivosinc.com>,
"Shuah Khan" <shuah@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
Palmer Dabbelt <palmer@rivosinc.com>,
Vincent Chen <vincent.chen@sifive.com>,
Greentime Hu <greentime.hu@sifive.com>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kselftest@vger.kernel.org
Subject: [PATCH v4 3/9] riscv: cpufeature: call match_isa_ext() for single-letter extensions
Date: Fri, 12 Apr 2024 14:48:59 +0800 [thread overview]
Message-ID: <20240412-zve-detection-v4-3-e0c45bb6b253@sifive.com> (raw)
In-Reply-To: <20240412-zve-detection-v4-0-e0c45bb6b253@sifive.com>
Single-letter extensions may also imply multiple subextensions. For
example, Vector extension implies zve64d, and zve64d implies zve64f.
Extension parsing for "riscv,isa-extensions" has the ability to resolve
the dependency by calling match_isa_ext(). This patch makes deprecated
parser call the same function for single letter extensions.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
Changelog v3:
- Remove set_bit for single-letter extensions as they are all checked in
match_isa_ext. (Clément)
---
arch/riscv/kernel/cpufeature.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index d22b12072579..f6f3ece60d69 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -468,16 +468,15 @@ static void __init riscv_parse_isa_string(unsigned long *this_hwcap, struct risc
if (unlikely(ext_err))
continue;
+
+ for (int i = 0; i < riscv_isa_ext_count; i++)
+ match_isa_ext(&riscv_isa_ext[i], ext, ext_end, isainfo);
+
if (!ext_long) {
int nr = tolower(*ext) - 'a';
- if (riscv_isa_extension_check(nr)) {
+ if (riscv_isa_extension_check(nr))
*this_hwcap |= isa2hwcap[nr];
- set_bit(nr, isainfo->isa);
- }
- } else {
- for (int i = 0; i < riscv_isa_ext_count; i++)
- match_isa_ext(&riscv_isa_ext[i], ext, ext_end, isainfo);
}
}
}
--
2.44.0.rc2
next prev parent reply other threads:[~2024-04-12 6:49 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-12 6:48 [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector subextensions Andy Chiu
2024-04-12 6:48 ` [PATCH v4 1/9] riscv: vector: add a comment when calling riscv_setup_vsize() Andy Chiu
2024-04-18 9:54 ` Conor Dooley
2024-04-12 6:48 ` [PATCH v4 2/9] riscv: smp: fail booting up smp if inconsistent vlen is detected Andy Chiu
2024-04-18 10:17 ` Conor Dooley
2024-04-19 6:09 ` [External] " yunhui cui
2024-04-24 20:01 ` Alexandre Ghiti
2024-05-08 8:21 ` Andy Chiu
2024-05-08 10:43 ` Alexandre Ghiti
2024-04-12 6:48 ` Andy Chiu [this message]
2024-04-18 10:29 ` [PATCH v4 3/9] riscv: cpufeature: call match_isa_ext() for single-letter extensions Conor Dooley
2024-04-12 6:49 ` [PATCH v4 4/9] riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection Andy Chiu
2024-04-18 10:19 ` Conor Dooley
2024-04-12 6:49 ` [PATCH v4 5/9] dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description Andy Chiu
2024-04-18 10:21 ` Conor Dooley
2024-04-12 6:49 ` [PATCH v4 6/9] riscv: hwprobe: add zve Vector subextensions into hwprobe interface Andy Chiu
2024-04-12 6:49 ` [PATCH v4 7/9] riscv: vector: adjust minimum Vector requirement to ZVE32X Andy Chiu
2024-04-18 11:02 ` Conor Dooley
2024-04-18 15:52 ` Eric Biggers
2024-04-18 16:53 ` Conor Dooley
2024-04-18 17:32 ` Eric Biggers
2024-04-18 17:39 ` Eric Biggers
2024-04-18 18:26 ` Conor Dooley
2024-04-18 18:28 ` Conor Dooley
2024-04-18 18:41 ` Eric Biggers
2024-04-18 20:00 ` Conor Dooley
2024-05-09 6:56 ` Andy Chiu
2024-05-09 7:48 ` Conor Dooley
2024-05-09 8:25 ` Conor Dooley
2024-05-09 22:22 ` Conor Dooley
2024-04-12 6:49 ` [PATCH v4 8/9] hwprobe: fix integer promotion in RISCV_HWPROBE_EXT macro Andy Chiu
2024-04-12 6:49 ` [PATCH v4 9/9] selftest: run vector prctl test for ZVE32X Andy Chiu
2024-04-25 23:00 ` [PATCH v4 0/9] Support Zve32[xf] and Zve64[xfd] Vector subextensions patchwork-bot+linux-riscv
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