From: Vaishnav Achath <vaishnav.a@ti.com>
To: <nm@ti.com>, <vigneshr@ti.com>, <kristo@kernel.org>,
<robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>
Cc: <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>,
<j-choudhary@ti.com>, <u-kumar1@ti.com>,
<linux-arm-kernel@lists.infradead.org>, <vaishnav.a@ti.com>
Subject: [PATCH] arm64: dts: ti: k3-j722s: Fix main domain GPIO count
Date: Tue, 7 May 2024 16:03:32 +0530 [thread overview]
Message-ID: <20240507103332.167928-1-vaishnav.a@ti.com> (raw)
J722S does not pin out all of the GPIO same as AM62P and have
more number of GPIO on the main_gpio1 instance. Fix the GPIO
count on both instances by overriding the ti,ngpio property.
Fixes: ea55b9335ad8 ("arm64: dts: ti: Introduce J722S family of SoCs")
More details at J722S/AM67 Datasheet (Section 5.3.11, GPIO):
https://www.ti.com/lit/ds/symlink/am67.pdf
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
---
Logs (6.9.0-rc7-next-20240507):
https://gist.github.com/vaishnavachath/2a629f73f4216fe00b74a7270b987534
arch/arm64/boot/dts/ti/k3-j722s.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j722s.dtsi b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
index c75744edb143..9132b0232b0b 100644
--- a/arch/arm64/boot/dts/ti/k3-j722s.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j722s.dtsi
@@ -83,6 +83,14 @@ &inta_main_dmss {
ti,interrupt-ranges = <7 71 21>;
};
+&main_gpio0 {
+ ti,ngpio = <87>;
+};
+
+&main_gpio1 {
+ ti,ngpio = <73>;
+};
+
&oc_sram {
reg = <0x00 0x70000000 0x00 0x40000>;
ranges = <0x00 0x00 0x70000000 0x40000>;
--
2.34.1
reply other threads:[~2024-05-07 10:33 UTC|newest]
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