From: Rob Herring <robh@kernel.org>
To: "Noralf Trønnes" <noralf@tronnes.org>
Cc: Neil Armstrong <neil.armstrong@linaro.org>,
Jessica Zhang <quic_jesszhan@quicinc.com>,
Sam Ravnborg <sam@ravnborg.org>, David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Kamlesh Gurudasani <kamlesh.gurudasani@gmail.com>,
Tommaso Merciai <tommaso.merciai@amarulasolutions.com>
Subject: Re: [PATCH 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property
Date: Tue, 7 May 2024 15:28:36 -0500 [thread overview]
Message-ID: <20240507202836.GA997432-robh@kernel.org> (raw)
In-Reply-To: <20240507-panel-mipi-dbi-rgb666-v1-1-6799234afa3e@tronnes.org>
On Tue, May 07, 2024 at 11:57:26AM +0200, Noralf Trønnes wrote:
> The MIPI DBI 2.0 specification (2005) lists only two pixel formats for
> the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with
> 2 options for bit layout.
>
> For Type A and B (parallel) the following formats are listed: RGB332,
> RGB444, RGB565, RGB666 and RGB888 (some have 2 options for the bit layout).
>
> Many MIPI DBI compatible controllers support all interface types on the
> same chip and often the manufacturers have chosen to provide support for
> the Type A/B interface pixel formats also on the Type C interface.
>
> Some chips provide many pixel formats with optional bit layouts over SPI,
> but the most common by far are RGB565 and RGB666. So even if the
> specification doesn't list these formats for the Type C interface, the
> industry has chosen to include them.
>
> The MIPI DCS specification lists the standard commands that can be sent
> over the MIPI DBI interface. The set_address_mode (36h) command has one
> bit in the parameter that controls RGB/BGR order:
> This bit controls the RGB data latching order transferred from the
> peripheral’s frame memory to the display device.
> This means that each supported RGB format also has a BGR variant.
>
> Based on this rationale document the following pixel formats describing
> the bit layout going over the wire:
> - RGB111 (option 1): x2r1g1b1r1g1b1 (2 pixels per byte)
> - BGR111 (option 1): x2b1g1r1b1g1r1 (2 pixels per byte)
> - RGB111 (option 2): x1r1g1b1x1r1g1b1 (2 pixels per byte)
> - BGR111 (option 2): x1b1g1r1x1b1g1r1 (2 pixels per byte)
> - RGB565: r5g6b5 (2 bytes)
> - BGR565: b5g6r5 (2 bytes)
> - RGB666: r6x2g6x2b6x2 (3 bytes)
> - BGR666: b6x2g6x2r6x2 (3 bytes)
> (x: don't care)
>
> Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
> ---
> .../bindings/display/panel/panel-mipi-dbi-spi.yaml | 31 ++++++++++++++++++++++
> 1 file changed, 31 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> index e808215cb39e..dac8f9af100e 100644
> --- a/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> +++ b/Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
> @@ -50,6 +50,12 @@ description: |
> | Command or data |
> |<D7><D6><D5><D4><D3><D2><D1><D0>|
>
> + The standard defines one pixel format for type C: RGB111. The industry
> + however has decided to provide the type A/B interface pixel formats also on
> + the Type C interface and most common among these are RGB565 and RGB666.
> + The MIPI DCS command set_address_mode (36h) has one bit that controls RGB/BGR
> + order. This gives each supported RGB format a BGR variant.
> +
> The panel resolution is specified using the panel-timing node properties
> hactive (width) and vactive (height). The other mandatory panel-timing
> properties should be set to zero except clock-frequency which can be
> @@ -90,6 +96,29 @@ properties:
>
> spi-3wire: true
>
> + format:
> + description: >
> + Pixel format in bit order as going on the wire:
> + * `x2r1g1b1r1g1b1` - RGB111, 2 pixels per byte
> + * `x2b1g1r1b1g1r1` - BGR111, 2 pixels per byte
> + * `x1r1g1b1x1r1g1b1` - RGB111, 2 pixels per byte
> + * `x1b1g1r1x1b1g1r1` - BGR111, 2 pixels per byte
> + * `r5g6b5` - RGB565, 2 bytes
> + * `b5g6r5` - BGR565, 2 bytes
> + * `r6x2g6x2b6x2` - RGB666, 3 bytes
> + * `b6x2g6x2r6x2` - BGR666, 3 bytes
> + This property is optional for backwards compatibility and `r5g6b5` is
> + assumed in its absence.
Use schemas, not free form text:
default: r5g6b5
> + enum:
> + - x2r1g1b1r1g1b1
> + - x2b1g1r1b1g1r1
> + - x1r1g1b1x1r1g1b1
> + - x1b1g1r1x1b1g1r1
> + - r5g6b5
> + - b5g6r5
> + - r6x2g6x2b6x2
> + - b6x2g6x2r6x2
> +
> required:
> - compatible
> - reg
> @@ -116,6 +145,8 @@ examples:
> reset-gpios = <&gpio 25 GPIO_ACTIVE_HIGH>;
> write-only;
>
> + format = "r5g6b5";
> +
> backlight = <&backlight>;
>
> width-mm = <35>;
>
> --
> 2.45.0
>
next prev parent reply other threads:[~2024-05-07 20:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-07 9:57 [PATCH 0/5] drm/tiny: panel-mipi-dbi: Support 18 bits per color RGB666 Noralf Trønnes via B4 Relay
2024-05-07 9:57 ` [PATCH 1/5] dt-bindings: display: panel: mipi-dbi-spi: Add a pixel format property Noralf Trønnes via B4 Relay
2024-05-07 20:28 ` Rob Herring [this message]
2024-05-07 9:57 ` [PATCH 2/5] drm/mipi-dbi: Remove mipi_dbi_machine_little_endian() Noralf Trønnes via B4 Relay
2024-05-07 9:57 ` [PATCH 3/5] drm/mipi-dbi: Make bits per word configurable for pixel transfers Noralf Trønnes via B4 Relay
2024-05-07 9:57 ` [PATCH 4/5] drm/mipi-dbi: Add support for DRM_FORMAT_RGB888 Noralf Trønnes via B4 Relay
2024-05-07 9:57 ` [PATCH 5/5] drm/tiny: panel-mipi-dbi: Support the pixel format property Noralf Trønnes via B4 Relay
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