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[98.183.112.25]) by smtp.gmail.com with ESMTPSA id 46e09a7af769-6f0e259e71dsm667035a34.56.2024.05.10.07.21.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 10 May 2024 07:21:38 -0700 (PDT) Message-ID: Date: Fri, 10 May 2024 09:21:37 -0500 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 5/6] dt-bindings: iio: adc: ad7192: Add AD7194 support To: Alisa-Dariana Roman , Conor Dooley Cc: michael.hennerich@analog.com, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, alexandru.tachici@analog.com, lars@metafoo.de, jic23@kernel.org, robh@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, lgirdwood@gmail.com, broonie@kernel.org, andy@kernel.org, nuno.sa@analog.com, marcelo.schmitt@analog.com, bigunclemax@gmail.com, okan.sahin@analog.com, fr0st61te@gmail.com, alisa.roman@analog.com, marcus.folkesson@gmail.com, schnelle@linux.ibm.com, liambeguin@gmail.com References: <20240430162946.589423-1-alisa.roman@analog.com> <20240430162946.589423-6-alisa.roman@analog.com> <20240430-winnings-wrongness-32328ccfe3b5@spud> <73365049-670b-4068-a159-fbdd0539f5a9@gmail.com> Content-Language: en-US From: David Lechner In-Reply-To: <73365049-670b-4068-a159-fbdd0539f5a9@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On 5/10/24 5:05 AM, Alisa-Dariana Roman wrote: > On 30.04.2024 20:21, Conor Dooley wrote: >> On Tue, Apr 30, 2024 at 07:29:45PM +0300, Alisa-Dariana Roman wrote: >>> +      diff-channels: >>> +        description: >>> +          Both inputs can be connected to pins AIN1 to AIN16 by choosing the >>> +          appropriate value from 1 to 16. >>> +        items: >>> +          minimum: 1 >>> +          maximum: 16 >>> + >>> +      single-channel: >>> +        description: >>> +          Positive input can be connected to pins AIN1 to AIN16 by choosing the >>> +          appropriate value from 1 to 16. Negative input is connected to AINCOM. >>> +        items: >>> +          minimum: 1 >>> +          maximum: 16 >> >> Up to 16 differential channels and 16 single-ended channels, but only 16 >> pins? Would the number of differential channels not max out at 8? > > Hello, Conor! I really appreciate the feedback! > > The way I thought about it, the only thing constraining the number of channels is the reg number (minimum: 0, maximum: 271). 272 channels cover all possible combinations (16*16 differential and 16 single ended) and I thought there is no need for anything stricter. I added items: minimum:1 maximum:16 to make sure the numbers are from 1 to 16, corresponding to AIN1-AIN16. > > Please let me know what should be improved! > > Kind regards, > Alisa-Dariana Roman. > Having looked at the datasheet for this and other similar chips, I agree that this reasoning makes sense. Some of the similar chips that have fixed channel assignments still have, e.g. a channel where + and - are both AIN2 (I assume for diagnostics). So I think it makes sense to allow for doing something similar here even if the most common use cases will probably have at most 16 channels defined in the .dts.