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From: Andy Chiu <andy.chiu@sifive.com>
To: "Paul Walmsley" <paul.walmsley@sifive.com>,
	"Palmer Dabbelt" <palmer@dabbelt.com>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Andy Chiu" <andy.chiu@sifive.com>, "Guo Ren" <guoren@kernel.org>,
	"Conor Dooley" <conor@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
	"Jonathan Corbet" <corbet@lwn.net>,
	"Evan Green" <evan@rivosinc.com>,
	"Clément Léger" <cleger@rivosinc.com>,
	"Shuah Khan" <shuah@kernel.org>
Cc: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
	 Palmer Dabbelt <palmer@rivosinc.com>,
	 Vincent Chen <vincent.chen@sifive.com>,
	 Greentime Hu <greentime.hu@sifive.com>,
	devicetree@vger.kernel.org,  linux-doc@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: [PATCH v5 8/8] selftest: run vector prctl test for ZVE32X
Date: Fri, 10 May 2024 00:26:58 +0800	[thread overview]
Message-ID: <20240510-zve-detection-v5-8-0711bdd26c12@sifive.com> (raw)
In-Reply-To: <20240510-zve-detection-v5-0-0711bdd26c12@sifive.com>

The minimal requirement for running Vector subextension on Linux is
ZVE32X. So change the test accordingly to run prctl as long as it find
it.

Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
---
Changelog v4:
 - new patch since v4
---
 tools/testing/selftests/riscv/vector/vstate_prctl.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/testing/selftests/riscv/vector/vstate_prctl.c b/tools/testing/selftests/riscv/vector/vstate_prctl.c
index 27668fb3b6d0..895177f6bf4c 100644
--- a/tools/testing/selftests/riscv/vector/vstate_prctl.c
+++ b/tools/testing/selftests/riscv/vector/vstate_prctl.c
@@ -88,16 +88,16 @@ int main(void)
 		return -2;
 	}
 
-	if (!(pair.value & RISCV_HWPROBE_IMA_V)) {
+	if (!(pair.value & RISCV_HWPROBE_EXT_ZVE32X)) {
 		rc = prctl(PR_RISCV_V_GET_CONTROL);
 		if (rc != -1 || errno != EINVAL) {
-			ksft_test_result_fail("GET_CONTROL should fail on kernel/hw without V\n");
+			ksft_test_result_fail("GET_CONTROL should fail on kernel/hw without ZVE32X\n");
 			return -3;
 		}
 
 		rc = prctl(PR_RISCV_V_SET_CONTROL, PR_RISCV_V_VSTATE_CTRL_ON);
 		if (rc != -1 || errno != EINVAL) {
-			ksft_test_result_fail("GET_CONTROL should fail on kernel/hw without V\n");
+			ksft_test_result_fail("SET_CONTROL should fail on kernel/hw without ZVE32X\n");
 			return -4;
 		}
 

-- 
2.44.0.rc2


      parent reply	other threads:[~2024-05-09 16:27 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-09 16:26 [PATCH v5 0/8] Support Zve32[xf] and Zve64[xfd] Vector subextensions Andy Chiu
2024-05-09 16:26 ` [PATCH v5 1/8] riscv: vector: add a comment when calling riscv_setup_vsize() Andy Chiu
2024-05-09 16:26 ` [PATCH v5 2/8] riscv: smp: fail booting up smp if inconsistent vlen is detected Andy Chiu
2024-05-09 16:26 ` [PATCH v5 3/8] riscv: cpufeature: call match_isa_ext() for single-letter extensions Andy Chiu
2024-05-09 16:26 ` [PATCH v5 4/8] dt-bindings: riscv: add Zve32[xf] Zve64[xfd] ISA extension description Andy Chiu
2024-05-09 16:26 ` [PATCH v5 5/8] riscv: cpufeature: add zve32[xf] and zve64[xfd] isa detection Andy Chiu
2024-05-09 16:26 ` [PATCH v5 6/8] riscv: hwprobe: add zve Vector subextensions into hwprobe interface Andy Chiu
2024-05-09 16:26 ` [PATCH v5 7/8] riscv: vector: adjust minimum Vector requirement to ZVE32X Andy Chiu
2024-05-09 16:26 ` Andy Chiu [this message]

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