messages from 2021-02-18 07:09:35 to 2021-03-24 05:33:23 UTC [more...]
[PATCH V4 XRT Alveo 00/20] XRT Alveo driver overview
2021-03-24 5:29 UTC (2+ messages)
` [PATCH V4 XRT Alveo 01/20] Documentation: fpga: Add a document describing XRT Alveo drivers
[PATCH v9 1/1] fpga: dfl: afu: harden port enable logic
2021-03-23 22:46 UTC
[PATCH v8 1/1] fpga: dfl: afu: harden port enable logic
2021-03-23 19:08 UTC (2+ messages)
[GIT PULL] First set of FPGA Manager changes for 5.13-rc1
2021-03-23 9:00 UTC (2+ messages)
[RESEND PATCH v10 0/7] FPGA Security Manager Class Driver
2021-03-22 15:50 UTC (8+ messages)
` [RESEND PATCH v10 1/7] fpga: sec-mgr: fpga security manager class driver
` [RESEND PATCH v10 2/7] fpga: sec-mgr: enable secure updates
` [RESEND PATCH v10 3/7] fpga: sec-mgr: expose sec-mgr update status
` [RESEND PATCH v10 4/7] fpga: sec-mgr: expose sec-mgr update errors
` [RESEND PATCH v10 5/7] fpga: sec-mgr: expose sec-mgr update size
` [RESEND PATCH v10 6/7] fpga: sec-mgr: enable cancel of secure update
` [RESEND PATCH v10 7/7] fpga: sec-mgr: expose hardware error info
[PATCHv5 0/7] Extend Intel service layer, FPGA manager and region
2021-03-22 15:53 UTC (14+ messages)
` [PATCHv5 1/7] firmware: stratix10-svc: reset COMMAND_RECONFIG_FLAG_PARTIAL to 0
` FW: [PATCHv5 0/7] Extend Intel service layer, FPGA manager and region
[PATCH v3 00/15] arm64 / clk: socfpga: simplifying, cleanups and compile testing
2021-03-22 15:10 UTC (20+ messages)
` [PATCH v3 01/15] clk: socfpga: allow building N5X clocks with ARCH_N5X
` [PATCH v3 02/15] ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
` [PATCH v3 03/15] mfd: altera: merge ARCH_SOCFPGA and ARCH_STRATIX10
` [PATCH v3 04/15] net: stmmac: "
` [PATCH v3 05/15] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers
` [PATCH v3 06/15] clk: socfpga: merge ARCH_SOCFPGA and ARCH_STRATIX10
` [PATCH v3 07/15] EDAC: altera: "
` [PATCH v3 08/15] arm64: socfpga: merge Agilex and N5X into ARCH_INTEL_SOCFPGA
` [PATCH v3 09/15] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
` [PATCH v3 10/15] clk: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs (and compile test)
` [PATCH v3 11/15] dmaengine: socfpga: use ARCH_INTEL_SOCFPGA also for 32-bit ARM SoCs
` [PATCH v3 12/15] fpga: altera: "
` [PATCH v3 13/15] i2c: "
` [PATCH v3 14/15] reset: socfpga: "
` [PATCH v3 15/15] ARM: socfpga: drop ARCH_SOCFPGA
[PATCH V3 XRT Alveo 00/18] XRT Alveo driver overview
2021-03-18 0:44 UTC (86+ messages)
` [PATCH V3 XRT Alveo 01/18] Documentation: fpga: Add a document describing XRT Alveo drivers
` [PATCH V3 XRT Alveo 02/18] fpga: xrt: driver metadata helper functions
` [PATCH V3 XRT Alveo 03/18] fpga: xrt: xclbin file "
` [PATCH V3 XRT Alveo 04/18] fpga: xrt: xrt-lib platform driver manager
` [PATCH V3 XRT Alveo 05/18] fpga: xrt: group platform driver
` [PATCH V3 XRT Alveo 06/18] fpga: xrt: platform driver infrastructure
` [PATCH V3 XRT Alveo 07/18] fpga: xrt: management physical function driver (root)
` [PATCH V3 XRT Alveo 08/18] fpga: xrt: main platform driver for management function device
` [PATCH V3 XRT Alveo 09/18] fpga: xrt: fpga-mgr and region implementation for xclbin download
` [PATCH V3 XRT Alveo 10/18] fpga: xrt: VSEC platform driver
` [PATCH V3 XRT Alveo 11/18] fpga: xrt: UCS "
` [PATCH V3 XRT Alveo 12/18] fpga: xrt: ICAP "
` [PATCH V3 XRT Alveo 13/18] fpga: xrt: devctl "
` [PATCH V3 XRT Alveo 14/18] fpga: xrt: clock "
` [PATCH V3 XRT Alveo 15/18] fpga: xrt: clock frequence counter "
` [PATCH V3 XRT Alveo 16/18] fpga: xrt: DDR calibration "
` [PATCH V3 XRT Alveo 17/18] fpga: xrt: partition isolation "
` [PATCH V3 XRT Alveo 18/18] fpga: xrt: Kconfig and Makefile updates for XRT drivers
LPC FPGA micro conference
2021-03-16 19:00 UTC
[PATCH v12 0/2] UIO support for dfl devices
2021-03-16 5:10 UTC (4+ messages)
` [PATCH v12 1/2] uio: uio_dfl: add userspace i/o driver for DFL bus
` [PATCH v12 2/2] Documentation: fpga: dfl: Add description for DFL UIO support
[PATCH v11 0/5] Intel MAX10 BMC Secure Update Driver
2021-03-15 23:35 UTC (6+ messages)
` [PATCH v11 1/5] fpga: m10bmc-sec: create max10 bmc secure update driver
` [PATCH v11 2/5] fpga: m10bmc-sec: expose max10 flash update count
` [PATCH v11 3/5] fpga: m10bmc-sec: expose max10 canceled keys in sysfs
` [PATCH v11 4/5] fpga: m10bmc-sec: add max10 secure update functions
` [PATCH v11 5/5] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func
[PATCH v10 0/5] Intel MAX10 BMC Secure Update Driver
2021-03-13 15:19 UTC (8+ messages)
` [PATCH v10 1/5] fpga: m10bmc-sec: create max10 bmc secure update driver
` [PATCH v10 2/5] fpga: m10bmc-sec: expose max10 flash update count
` [PATCH v10 3/5] fpga: m10bmc-sec: expose max10 canceled keys in sysfs
` [PATCH v10 4/5] fpga: m10bmc-sec: add max10 secure update functions
` [PATCH v10 5/5] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func
[RFC v2 0/5] arm64 / clk: socfpga: simplifying, cleanups and compile testing
2021-03-11 14:50 UTC (18+ messages)
` [RFC v2 1/5] clk: socfpga: allow building N5X clocks with ARCH_N5X
` [RFC v2 2/5] clk: socfpga: build together Stratix 10, Agilex and N5X clock drivers
` [RFC v2 3/5] arm64: socfpga: rename ARCH_STRATIX10 to ARCH_SOCFPGA64
` [RFC v2 4/5] arm64: intel: merge Agilex and N5X into ARCH_SOCFPGA64
` [RFC v2 5/5] clk: socfpga: allow compile testing of Stratix 10 / Agilex clocks
[PATCH v3 0/3] Add Bitstream configuration support for Versal
2021-03-10 17:19 UTC (8+ messages)
` [PATCH v3 1/3] drivers: firmware: Add PDI load API support
` [PATCH v3 2/3] dt-bindings: fpga: Add binding doc for versal fpga manager
` [PATCH v3 3/3] fpga: versal-fpga: Add versal fpga manager driver
[PATCH v10 0/7] FPGA Security Manager Class Driver
2021-03-10 15:42 UTC (11+ messages)
` [PATCH v10 1/7] fpga: sec-mgr: fpga security manager class driver
` [PATCH v10 2/7] fpga: sec-mgr: enable secure updates
` [PATCH v10 3/7] fpga: sec-mgr: expose sec-mgr update status
` [PATCH v10 4/7] fpga: sec-mgr: expose sec-mgr update errors
` [PATCH v10 5/7] fpga: sec-mgr: expose sec-mgr update size
` [PATCH v10 6/7] fpga: sec-mgr: enable cancel of secure update
` [PATCH v10 7/7] fpga: sec-mgr: expose hardware error info
[PATCH v9 0/5] Intel MAX10 BMC Secure Update Driver
2021-03-09 1:10 UTC (6+ messages)
` [PATCH v9 1/5] fpga: m10bmc-sec: create max10 bmc secure update driver
` [PATCH v9 2/5] fpga: m10bmc-sec: expose max10 flash update count
` [PATCH v9 3/5] fpga: m10bmc-sec: expose max10 canceled keys in sysfs
` [PATCH v9 4/5] fpga: m10bmc-sec: add max10 secure update functions
` [PATCH v9 5/5] fpga: m10bmc-sec: add max10 get_hw_errinfo callback func
[PATCH] fpga: xilinx-pr-decoupler: Simplify code by using dev_err_probe()
2021-03-06 15:41 UTC (2+ messages)
[PATCH] fpga: fpga-mgr: xilinx-spi: fix error messages on -EPROBE_DEFER
2021-03-06 15:40 UTC (2+ messages)
[PATCH v2 0/2] Add DFX AXI Shutdown manager IP support for Xilinx
2021-03-05 19:18 UTC (8+ messages)
` [PATCH v2 1/2] dt-bindings: fpga: Add compatible value for Xilinx DFX AXI shutdown manager
` [PATCH v2 2/2] fpga: Add support for Xilinx DFX AXI Shutdown manager
[PATCH 1/2] fpga: mgr: Adds secure BitStream loading support
2021-03-03 23:12 UTC (5+ messages)
[RESEND PATCH v11 0/2] UIO support for dfl devices
2021-02-28 17:20 UTC (6+ messages)
` [RESEND PATCH v11 1/2] uio: uio_dfl: add userspace i/o driver for DFL bus
` [RESEND PATCH v11 2/2] Documentation: fpga: dfl: Add description for DFL UIO support
[PATCH v11 0/2] UIO support for dfl devices
2021-02-27 15:07 UTC (6+ messages)
[PATCH v7 1/1] fpga: dfl: afu: harden port enable logic
2021-02-23 17:43 UTC
[PATCH v6 1/1] fpga: dfl: afu: harden port enable logic
2021-02-23 5:43 UTC (2+ messages)
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