From: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chester Lin <chester62515@gmail.com>,
Matthias Brugger <mbrugger@suse.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
Larisa Grigore <larisa.grigore@nxp.com>,
Lee Jones <lee@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>
Cc: Alberto Ruiz <aruizrui@redhat.com>,
Christophe Lizzi <clizzi@redhat.com>,
devicetree@vger.kernel.org, Enric Balletbo <eballetb@redhat.com>,
Eric Chanudet <echanude@redhat.com>,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
NXP S32 Linux Team <s32@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
"Vincent Guittot devicetree @ vger . kernel . org"
<vincent.guittot@linaro.org>
Subject: [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages
Date: Tue, 20 Jan 2026 13:59:16 +0200 [thread overview]
Message-ID: <20260120115923.3463866-5-khristineandreea.barbulescu@oss.nxp.com> (raw)
In-Reply-To: <20260120115923.3463866-1-khristineandreea.barbulescu@oss.nxp.com>
From: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
Change dev_err&return statements into dev_err_probe throughout the driver
on the probing path. Moreover, add/fix some comments and print
statements.
Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
---
drivers/pinctrl/nxp/pinctrl-s32cc.c | 106 +++++++++++++++-------------
1 file changed, 55 insertions(+), 51 deletions(-)
diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinctrl-s32cc.c
index 35511f83d056..a98f8e7c2768 100644
--- a/drivers/pinctrl/nxp/pinctrl-s32cc.c
+++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c
@@ -2,7 +2,7 @@
/*
* Core driver for the S32 CC (Common Chassis) pin controller
*
- * Copyright 2017-2022,2024 NXP
+ * Copyright 2017-2022,2024-2025 NXP
* Copyright (C) 2022 SUSE LLC
* Copyright 2015-2016 Freescale Semiconductor, Inc.
*/
@@ -60,14 +60,20 @@ static u32 get_pin_func(u32 pinmux)
return pinmux & GENMASK(3, 0);
}
+/**
+ * struct s32_pinctrl_mem_region - memory region for a set of SIUL2 registers
+ * @map: regmap used for this range
+ * @pin_range: the pins controlled by these registers
+ * @name: name of the current range
+ */
struct s32_pinctrl_mem_region {
struct regmap *map;
const struct s32_pin_range *pin_range;
char name[8];
};
-/*
- * Holds pin configuration for GPIO's.
+/**
+ * struct gpio_pin_config - holds pin configuration for GPIO's
* @pin_id: Pin ID for this GPIO
* @config: Pin settings
* @list: Linked list entry for each gpio pin
@@ -78,21 +84,23 @@ struct gpio_pin_config {
struct list_head list;
};
-/*
- * Pad config save/restore for power suspend/resume.
+/**
+ * struct s32_pinctrl_context - pad config save/restore for suspend/resume
+ * @pads: saved values for the pards
*/
struct s32_pinctrl_context {
unsigned int *pads;
};
-/*
+/**
+ * struct s32_pinctrl - private driver data
* @dev: a pointer back to containing device
* @pctl: a pointer to the pinctrl device structure
* @regions: reserved memory regions with start/end pin
* @info: structure containing information about the pin
- * @gpio_configs: Saved configurations for GPIO pins
- * @gpiop_configs_lock: lock for the `gpio_configs` list
- * @s32_pinctrl_context: Configuration saved over system sleep
+ * @gpio_configs: saved configurations for GPIO pins
+ * @gpio_configs_lock: lock for the `gpio_configs` list
+ * @saved_context: configuration saved over system sleep
*/
struct s32_pinctrl {
struct device *dev;
@@ -123,13 +131,13 @@ s32_get_region(struct pinctrl_dev *pctldev, unsigned int pin)
return NULL;
}
-static inline int s32_check_pin(struct pinctrl_dev *pctldev,
- unsigned int pin)
+static int s32_check_pin(struct pinctrl_dev *pctldev,
+ unsigned int pin)
{
return s32_get_region(pctldev, pin) ? 0 : -EINVAL;
}
-static inline int s32_regmap_read(struct pinctrl_dev *pctldev,
+static int s32_regmap_read(struct pinctrl_dev *pctldev,
unsigned int pin, unsigned int *val)
{
struct s32_pinctrl_mem_region *region;
@@ -145,7 +153,7 @@ static inline int s32_regmap_read(struct pinctrl_dev *pctldev,
return regmap_read(region->map, offset, val);
}
-static inline int s32_regmap_write(struct pinctrl_dev *pctldev,
+static int s32_regmap_write(struct pinctrl_dev *pctldev,
unsigned int pin,
unsigned int val)
{
@@ -163,7 +171,7 @@ static inline int s32_regmap_write(struct pinctrl_dev *pctldev,
}
-static inline int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin,
+static int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin,
unsigned int mask, unsigned int val)
{
struct s32_pinctrl_mem_region *region;
@@ -236,10 +244,10 @@ static int s32_dt_group_node_to_map(struct pinctrl_dev *pctldev,
}
ret = pinconf_generic_parse_dt_config(np, pctldev, &cfgs, &n_cfgs);
- if (ret) {
- dev_err(dev, "%pOF: could not parse node property\n", np);
- return ret;
- }
+ if (ret)
+ return dev_err_probe(dev, ret,
+ "%pOF: could not parse node property\n",
+ np);
if (n_cfgs)
reserve++;
@@ -321,7 +329,7 @@ static int s32_pmx_set(struct pinctrl_dev *pctldev, unsigned int selector,
/* Check beforehand so we don't have a partial config. */
for (i = 0; i < grp->data.npins; i++) {
if (s32_check_pin(pctldev, grp->data.pins[i]) != 0) {
- dev_err(info->dev, "invalid pin: %u in group: %u\n",
+ dev_err(info->dev, "Invalid pin: %u in group: %u\n",
grp->data.pins[i], group);
return -EINVAL;
}
@@ -476,8 +484,8 @@ static int s32_get_slew_regval(int arg)
return -EINVAL;
}
-static inline void s32_pin_set_pull(enum pin_config_param param,
- unsigned int *mask, unsigned int *config)
+static void s32_pin_set_pull(enum pin_config_param param,
+ unsigned int *mask, unsigned int *config)
{
switch (param) {
case PIN_CONFIG_BIAS_DISABLE:
@@ -763,15 +771,15 @@ static int s32_pinctrl_parse_groups(struct device_node *np,
grp->data.name = np->name;
npins = of_property_count_elems_of_size(np, "pinmux", sizeof(u32));
- if (npins < 0) {
- dev_err(dev, "Failed to read 'pinmux' property in node %s.\n",
- grp->data.name);
- return -EINVAL;
- }
- if (!npins) {
- dev_err(dev, "The group %s has no pins.\n", grp->data.name);
- return -EINVAL;
- }
+ if (npins < 0)
+ return dev_err_probe(dev, -EINVAL,
+ "Failed to read 'pinmux' in node %s\n",
+ grp->data.name);
+
+ if (!npins)
+ return dev_err_probe(dev, -EINVAL,
+ "The group %s has no pins\n",
+ grp->data.name);
grp->data.npins = npins;
@@ -812,10 +820,9 @@ static int s32_pinctrl_parse_functions(struct device_node *np,
/* Initialise function */
func->name = np->name;
func->ngroups = of_get_child_count(np);
- if (func->ngroups == 0) {
- dev_err(info->dev, "no groups defined in %pOF\n", np);
- return -EINVAL;
- }
+ if (func->ngroups == 0)
+ return dev_err_probe(info->dev, -EINVAL,
+ "No groups defined in %pOF\n", np);
groups = devm_kcalloc(info->dev, func->ngroups,
sizeof(*func->groups), GFP_KERNEL);
@@ -886,10 +893,9 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
}
nfuncs = of_get_child_count(np);
- if (nfuncs <= 0) {
- dev_err(&pdev->dev, "no functions defined\n");
- return -EINVAL;
- }
+ if (nfuncs <= 0)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "No functions defined\n");
info->nfunctions = nfuncs;
info->functions = devm_kcalloc(&pdev->dev, nfuncs,
@@ -919,18 +925,17 @@ static int s32_pinctrl_probe_dt(struct platform_device *pdev,
int s32_pinctrl_probe(struct platform_device *pdev,
const struct s32_pinctrl_soc_data *soc_data)
{
- struct s32_pinctrl *ipctl;
- int ret;
- struct pinctrl_desc *s32_pinctrl_desc;
- struct s32_pinctrl_soc_info *info;
#ifdef CONFIG_PM_SLEEP
struct s32_pinctrl_context *saved_context;
#endif
+ struct pinctrl_desc *s32_pinctrl_desc;
+ struct s32_pinctrl_soc_info *info;
+ struct s32_pinctrl *ipctl;
+ int ret;
- if (!soc_data || !soc_data->pins || !soc_data->npins) {
- dev_err(&pdev->dev, "wrong pinctrl info\n");
- return -EINVAL;
- }
+ if (!soc_data || !soc_data->pins || !soc_data->npins)
+ return dev_err_probe(&pdev->dev, -EINVAL,
+ "Wrong pinctrl info\n");
info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
if (!info)
@@ -965,16 +970,15 @@ int s32_pinctrl_probe(struct platform_device *pdev,
s32_pinctrl_desc->owner = THIS_MODULE;
ret = s32_pinctrl_probe_dt(pdev, ipctl);
- if (ret) {
- dev_err(&pdev->dev, "fail to probe dt properties\n");
- return ret;
- }
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret,
+ "Fail to probe dt properties\n");
ipctl->pctl = devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc,
ipctl);
if (IS_ERR(ipctl->pctl))
return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl),
- "could not register s32 pinctrl driver\n");
+ "Could not register s32 pinctrl driver\n");
#ifdef CONFIG_PM_SLEEP
saved_context = &ipctl->saved_context;
--
2.50.1
next prev parent reply other threads:[~2026-01-20 11:59 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 11:59 [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module Khristine Andreea Barbulescu
2026-01-21 2:19 ` Rob Herring
2026-02-19 11:36 ` Khristine Andreea Barbulescu
2026-02-20 10:16 ` Krzysztof Kozlowski
2026-02-20 14:36 ` Khristine Andreea Barbulescu
2026-02-20 14:41 ` Krzysztof Kozlowski
2026-02-23 11:51 ` Khristine Andreea Barbulescu
2026-02-23 13:14 ` Krzysztof Kozlowski
2026-02-25 9:40 ` Ghennadi Procopciuc
2026-03-03 13:28 ` Ghennadi Procopciuc
2026-03-13 17:10 ` Krzysztof Kozlowski
2026-03-14 7:31 ` Arnd Bergmann
2026-03-23 7:57 ` Khristine Andreea Barbulescu
2026-03-23 8:07 ` Krzysztof Kozlowski
2026-03-31 7:48 ` Khristine Andreea Barbulescu
2026-03-31 10:11 ` Arnd Bergmann
2026-03-31 13:43 ` Khristine Andreea Barbulescu
2026-03-31 14:08 ` Arnd Bergmann
2026-03-23 15:33 ` Arnd Bergmann
2026-02-20 10:18 ` Krzysztof Kozlowski
2026-02-20 14:14 ` Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 02/10] mfd: nxp-siul2: add support for NXP SIUL2 Khristine Andreea Barbulescu
2026-01-22 18:52 ` Sander Vanheule
2026-01-20 11:59 ` [PATCH v8 03/10] arm64: dts: s32g: change pinctrl node into the new mfd node Khristine Andreea Barbulescu
2026-01-27 9:13 ` Linus Walleij
2026-01-20 11:59 ` Khristine Andreea Barbulescu [this message]
2026-01-20 12:04 ` [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 05/10] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-01-20 12:04 ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell Khristine Andreea Barbulescu
2026-01-20 12:08 ` Bartosz Golaszewski
2026-01-23 13:57 ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 07/10] pinctrl: s32cc: skip syscon child nodes when parsing funcs and groups Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-27 9:14 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 08/10] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-01-23 13:56 ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 09/10] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Khristine Andreea Barbulescu
2026-01-27 9:17 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 10/10] pinctrl: s32cc: set num_custom_params to 0 Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-20 13:45 ` Daniel Baluta
2026-01-20 19:49 ` [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Rob Herring
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