From: Radu Sabau via B4 Relay <devnull+radu.sabau.analog.com@kernel.org>
To: "Lars-Peter Clausen" <lars@metafoo.de>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Uwe Kleine-König" <ukleinek@kernel.org>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Linus Walleij" <linusw@kernel.org>,
"Bartosz Golaszewski" <brgl@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>
Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
linux-gpio@vger.kernel.org, Radu Sabau <radu.sabau@analog.com>
Subject: [PATCH v3 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family
Date: Fri, 13 Mar 2026 12:07:24 +0200 [thread overview]
Message-ID: <20260313-ad4692-multichannel-sar-adc-driver-v3-0-b4d14d81a181@analog.com> (raw)
This series adds support for the Analog Devices AD4691 family of
high-speed, low-power multichannel successive approximation register
(SAR) ADCs with an SPI-compatible serial interface.
The family includes:
- AD4691: 16-channel, 500 kSPS
- AD4692: 16-channel, 1 MSPS
- AD4693: 8-channel, 500 kSPS
- AD4694: 8-channel, 1 MSPS
The devices support two operating modes, auto-detected from the device
tree:
- CNV Clock Mode: external PWM drives CNV independently of SPI;
DATA_READY on GP0 signals end of conversion
- Manual Mode: CNV tied to SPI CS; each SPI transfer reads
the previous conversion result and starts the
next (pipelined N+1 scheme)
A new driver is warranted rather than extending ad4695: the AD4691
data path uses an accumulator-register model — results are read from
AVG_IN registers, with ACC_MASK, ADC_SETUP, DEVICE_SETUP, and
GPIO_MODE registers controlling the sequencer — none of which exist
in AD4695. CNV Clock Mode (PWM drives CNV independently of SPI) and
Manual Mode (pipelined N+1 transfers) also have no equivalent in
AD4695's command-embedded single-cycle protocol.
The series is structured as follows:
1/4 - DT bindings (YAML schema + dt-bindings header) and
MAINTAINERS entry
2/4 - Initial driver: register map via custom regmap callbacks,
IIO read_raw/write_raw, both operating modes, single-channel
reads via internal oscillator (Autonomous Mode)
3/4 - Triggered buffer support: IRQ-driven (DATA_READY on GP0) for
CNV Clock Mode; hrtimer-based trigger for Manual Mode to
handle the pipelined N+1 SPI protocol
4/4 - SPI Engine offload support: DMA-backed high-throughput
capture path using the SPI offload subsystem
Datasheets:
https://www.analog.com/en/products/ad4691.html
https://www.analog.com/en/products/ad4692.html
https://www.analog.com/en/products/ad4693.html
https://www.analog.com/en/products/ad4694.html
Signed-off-by: Radu Sabau <radu.sabau@analog.com>
---
Changes in v3:
- Replace GPIO reset handling with reset controller framework
- Replace two regmap_write() calls for ACC_MASK1/ACC_MASK2 with regmap_bulk_write()
- Move conv_us declaration closer to its first use
- Derive spi_device/dev from regmap instead of storing st->spi
- ad4691_trigger_handler(): use guard(mutex)() and iio_for_each_active_channel()
- ad4691_setup_triggered_buffer(): return -ENOMEM/-ENOENT directly instead of
wrapping in dev_err_probe(); fix fwnode_irq_get() check (irq <= 0 → irq < 0)
- Add GENMASK defines for SPI offload 32-bit message layout; replace manual
bit-shifts with put_unaligned_be32() + FIELD_PREP()
- Use DIV_ROUND_CLOSEST_ULL() instead of div64_u64()
- ad4691_set_sampling_freq(): fix indentation; drop unnecessary else after return
- ad4691_probe(): use PTR_ERR_OR_ZERO() for devm_spi_offload_get()
- Link to v2: https://lore.kernel.org/r/20260310-ad4692-multichannel-sar-adc-driver-v2-0-d9bb8aeb5e17@analog.com
Changes in v2:
- Drop adi,spi-mode DT property; operating mode now auto-detected
from pwms presence (CNV Clock Mode if present, Manual Mode if not)
- Reduce from 5 operating modes to 2 (CNV Clock Mode, Manual Mode);
Autonomous, SPI Burst and CNV Burst modes removed as user-selectable
modes; Autonomous Mode is now the internal idle/single-shot state
- Single-shot read_raw always uses internal oscillator (Autonomous
Mode), independent of the configured buffer mode
- Replace bulk regulator API with devm_regulator_get_enable() and
devm_regulator_get_enable_read_voltage()
- Use guard(mutex) and IIO_DEV_ACQUIRE_DIRECT_MODE scoped helpers
- Replace enum + indexed chip_info array with named chip_info structs
- Remove product_id field and hardware ID check from probe
- Factor IIO_CHAN_INFO_RAW body into ad4691_single_shot_read() helper
- Use fwnode_irq_get(dev_fwnode(dev), 0); drop interrupt-names from
DT binding
- Use devm_clk_get_enabled(dev, NULL); drop clock-names from DT
binding
- Use spi_write_then_read() for DMA-safe register writes
- Use put_unaligned_be16() for SPI header construction
- fsleep() instead of usleep_range() in single-shot path
- storagebits 24->32 for manual-mode channels (uniform DMA layout)
- Collect full scan into vals[16], single iio_push_to_buffers_with_ts()
- Use pf->timestamp instead of iio_get_time_ns() in trigger handler
- Remove IRQF_TRIGGER_FALLING (comes from firmware/DT)
- Fix offload xfer array size ([17]: N channels + 1 state reset)
- Drop third DT binding example per reviewer request
- Link to v1: https://lore.kernel.org/r/20260305-ad4692-multichannel-sar-adc-driver-v1-0-336229a8dcc7@analog.com
---
Radu Sabau (4):
dt-bindings: iio: adc: add bindings for AD4691 family
iio: adc: ad4691: add initial driver for AD4691 family
iio: adc: ad4691: add triggered buffer support
iio: adc: ad4691: add SPI offload support
.../devicetree/bindings/iio/adc/adi,ad4691.yaml | 180 +++
MAINTAINERS | 9 +
drivers/iio/adc/Kconfig | 14 +
drivers/iio/adc/Makefile | 1 +
drivers/iio/adc/ad4691.c | 1505 ++++++++++++++++++++
include/dt-bindings/iio/adc/adi,ad4691.h | 13 +
6 files changed, 1722 insertions(+)
---
base-commit: 11439c4635edd669ae435eec308f4ab8a0804808
change-id: 20260302-ad4692-multichannel-sar-adc-driver-78e4d44d24b2
Best regards,
--
Radu Sabau <radu.sabau@analog.com>
next reply other threads:[~2026-03-13 10:07 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-13 10:07 Radu Sabau via B4 Relay [this message]
2026-03-13 10:07 ` [PATCH v3 1/4] dt-bindings: iio: adc: add bindings for AD4691 family Radu Sabau via B4 Relay
2026-03-14 9:41 ` Krzysztof Kozlowski
2026-03-16 11:55 ` Sabau, Radu bogdan
2026-03-14 15:29 ` David Lechner
2026-03-14 16:19 ` David Lechner
2026-03-16 12:39 ` Sabau, Radu bogdan
2026-03-16 12:55 ` Sabau, Radu bogdan
2026-03-16 15:14 ` David Lechner
2026-03-16 15:47 ` Sabau, Radu bogdan
2026-03-14 18:18 ` David Lechner
2026-03-13 10:07 ` [PATCH v3 2/4] iio: adc: ad4691: add initial driver " Radu Sabau via B4 Relay
2026-03-13 10:58 ` Andy Shevchenko
2026-03-16 15:29 ` Sabau, Radu bogdan
2026-03-16 15:51 ` David Lechner
2026-03-16 15:57 ` Sabau, Radu bogdan
2026-03-16 16:13 ` Andy Shevchenko
2026-03-14 11:04 ` Nuno Sá
2026-03-16 14:29 ` Sabau, Radu bogdan
2026-03-16 16:00 ` Sabau, Radu bogdan
2026-03-14 16:36 ` David Lechner
2026-03-16 13:01 ` Sabau, Radu bogdan
2026-03-25 15:01 ` kernel test robot
2026-03-13 10:07 ` [PATCH v3 3/4] iio: adc: ad4691: add triggered buffer support Radu Sabau via B4 Relay
2026-03-13 11:13 ` Andy Shevchenko
2026-03-13 12:09 ` Sabau, Radu bogdan
2026-03-13 14:40 ` Andy Shevchenko
2026-03-14 18:37 ` David Lechner
2026-03-16 13:22 ` Sabau, Radu bogdan
2026-03-16 15:37 ` David Lechner
2026-03-16 15:56 ` Sabau, Radu bogdan
2026-03-16 16:44 ` David Lechner
2026-03-17 9:27 ` Sabau, Radu bogdan
2026-03-13 10:07 ` [PATCH v3 4/4] iio: adc: ad4691: add SPI offload support Radu Sabau via B4 Relay
2026-03-14 19:37 ` David Lechner
2026-03-16 13:31 ` Sabau, Radu bogdan
2026-03-13 11:14 ` [PATCH v3 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family Andy Shevchenko
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