From: Prabhakar <prabhakar.csengg@gmail.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linusw@kernel.org>
Cc: linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v2 5/5] pinctrl: renesas: rzg2l: Handle PUPD for RZ/V2H(P) dedicated pins in PM
Date: Mon, 13 Apr 2026 19:24:55 +0100 [thread overview]
Message-ID: <20260413182456.811543-6-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
In-Reply-To: <20260413182456.811543-1-prabhakar.mahadev-lad.rj@bp.renesas.com>
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
On RZ/V2H(P), dedicated pins support pull-up/pull-down configuration
via PIN_CFG_PUPD. Add PUPD handling for dedicated pins in the PM
save/restore path.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- New patch
---
drivers/pinctrl/renesas/pinctrl-rzg2l.c | 19 ++++++++++++++++++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/pinctrl/renesas/pinctrl-rzg2l.c b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
index be6d229c927b..1aaa78469f52 100644
--- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
+++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
@@ -2798,6 +2798,12 @@ static int rzg2l_pinctrl_reg_cache_alloc(struct rzg2l_pinctrl *pctrl)
GFP_KERNEL);
if (!dedicated_cache->nod[i])
return -ENOMEM;
+
+ dedicated_cache->pupd[i] = devm_kcalloc(pctrl->dev, n_dedicated_pins,
+ sizeof(*dedicated_cache->pupd[i]),
+ GFP_KERNEL);
+ if (!dedicated_cache->pupd[i])
+ return -ENOMEM;
}
pctrl->cache = cache;
@@ -3136,7 +3142,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
* port offset are close together.
*/
for (i = 0, caps = 0; i < pctrl->data->n_dedicated_pins; i++) {
- bool has_iolh, has_ien, has_sr, has_nod;
+ bool has_iolh, has_ien, has_sr, has_nod, has_pupd;
u32 off, next_off = 0;
u64 cfg, next_cfg;
u8 pincnt;
@@ -3160,6 +3166,7 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
has_ien = !!(caps & PIN_CFG_IEN);
has_sr = !!(caps & PIN_CFG_SR);
has_nod = !!(caps & PIN_CFG_NOD);
+ has_pupd = !!(caps & PIN_CFG_PUPD);
pincnt = hweight8(FIELD_GET(RZG2L_SINGLE_PIN_BITS_MASK, cfg));
if (has_iolh) {
@@ -3178,6 +3185,11 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + NOD(off),
cache->nod[0][i]);
}
+ if (has_pupd) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend, pctrl->base + PUPD(off),
+ cache->pupd[0][i]);
+ }
+
if (pincnt >= 4) {
if (has_iolh) {
RZG2L_PCTRL_REG_ACCESS32(suspend,
@@ -3199,6 +3211,11 @@ static void rzg2l_pinctrl_pm_setup_dedicated_regs(struct rzg2l_pinctrl *pctrl, b
pctrl->base + NOD(off) + 4,
cache->nod[1][i]);
}
+ if (has_pupd) {
+ RZG2L_PCTRL_REG_ACCESS32(suspend,
+ pctrl->base + PUPD(off) + 4,
+ cache->pupd[1][i]);
+ }
}
caps = 0;
}
--
2.53.0
next prev parent reply other threads:[~2026-04-13 18:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-13 18:24 [PATCH v2 0/5] pinctrl: renesas: rzg2l: Fix PM register caching Prabhakar
2026-04-13 18:24 ` [PATCH v2 1/5] pinctrl: renesas: rzg2l: Fix SMT register cache handling Prabhakar
2026-04-22 11:35 ` Geert Uytterhoeven
2026-04-13 18:24 ` [PATCH v2 2/5] pinctrl: renesas: rzg2l: Add SR register cache for PM suspend/resume Prabhakar
2026-04-22 12:12 ` Geert Uytterhoeven
2026-04-13 18:24 ` [PATCH v2 3/5] pinctrl: renesas: rzg2l: Handle RZ/V2H(P) IOLH configuration in PM cache Prabhakar
2026-04-22 12:04 ` Geert Uytterhoeven
2026-04-24 8:22 ` Lad, Prabhakar
2026-04-24 8:27 ` Geert Uytterhoeven
2026-04-24 9:11 ` Lad, Prabhakar
2026-04-24 8:27 ` Lad, Prabhakar
2026-04-24 8:31 ` Geert Uytterhoeven
2026-04-13 18:24 ` [PATCH v2 4/5] pinctrl: renesas: rzg2l: Add NOD register cache for PM suspend/resume Prabhakar
2026-04-22 12:12 ` Geert Uytterhoeven
2026-04-13 18:24 ` Prabhakar [this message]
2026-04-22 12:12 ` [PATCH v2 5/5] pinctrl: renesas: rzg2l: Handle PUPD for RZ/V2H(P) dedicated pins in PM Geert Uytterhoeven
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