From: Linus Walleij <linusw@kernel.org>
To: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Abel Vesa <abel.vesa@oss.qualcomm.com>,
linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs
Date: Mon, 30 Mar 2026 10:31:02 +0200 [thread overview]
Message-ID: <CAD++jLna8XSqyo0m=59k3UFpZEmC3Kszh=oKeEFX_jXDpW9BMw@mail.gmail.com> (raw)
In-Reply-To: <20260327171240.3222755-2-mukesh.ojha@oss.qualcomm.com>
On Fri, Mar 27, 2026 at 6:16 PM Mukesh Ojha
<mukesh.ojha@oss.qualcomm.com> wrote:
> On all Qualcomm TLMM generations from APQ8084 onwards, the interrupt
> target routing bits are located in the same register as the interrupt
> configuration bits (intr_cfg_reg). Only five older SoCs — APQ8064,
> IPQ8064, MDM9615, MSM8660 and MSM8960 — have a genuinely separate
> interrupt target routing register at a different offset (0x400 + 0x4 * id).
>
> Replace MSM_ACCESSOR(intr_target) with a custom accessor that falls back
> to intr_cfg_reg when intr_target_reg is zero. Apply the same fallback in
> the SCM path. Drop the now-redundant .intr_target_reg initializer from
> all SoC drivers where it duplicated intr_cfg_reg, keeping it only in
> the five drivers where it genuinely differs.
>
> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com>
Patch applied so we get some rotation in linux-next for this. If Björn
has opinions
I will just pull it out again.
Yours,
Linus Walleij
next prev parent reply other threads:[~2026-03-30 8:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-27 17:12 [PATCH 1/2] pinctrl: qcom: eliza: Fix interrupt target bit Mukesh Ojha
2026-03-27 17:12 ` [PATCH 2/2] pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs Mukesh Ojha
2026-03-30 8:31 ` Linus Walleij [this message]
2026-03-28 12:32 ` [PATCH 1/2] pinctrl: qcom: eliza: Fix interrupt target bit Abel Vesa
2026-03-30 8:30 ` Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAD++jLna8XSqyo0m=59k3UFpZEmC3Kszh=oKeEFX_jXDpW9BMw@mail.gmail.com' \
--to=linusw@kernel.org \
--cc=abel.vesa@oss.qualcomm.com \
--cc=andersson@kernel.org \
--cc=dmitry.baryshkov@oss.qualcomm.com \
--cc=konrad.dybcio@oss.qualcomm.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mukesh.ojha@oss.qualcomm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).