From: Vincent Guittot <vincent.guittot@linaro.org>
To: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chester Lin <chester62515@gmail.com>,
Matthias Brugger <mbrugger@suse.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
Larisa Grigore <larisa.grigore@nxp.com>,
Lee Jones <lee@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Dong Aisheng <aisheng.dong@nxp.com>,
Jacky Bai <ping.bai@nxp.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Alberto Ruiz <aruizrui@redhat.com>,
Christophe Lizzi <clizzi@redhat.com>,
devicetree@vger.kernel.org, Enric Balletbo <eballetb@redhat.com>,
Eric Chanudet <echanude@redhat.com>,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
NXP S32 Linux Team <s32@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>
Subject: Re: [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell
Date: Fri, 23 Jan 2026 14:57:58 +0100 [thread overview]
Message-ID: <CAKfTPtD6LOMFGhzG3dhiSQCNbYrGLjBiT83eqz9mmwaDVpNV=w@mail.gmail.com> (raw)
In-Reply-To: <20260120115923.3463866-7-khristineandreea.barbulescu@oss.nxp.com>
On Tue, 20 Jan 2026 at 12:59, Khristine Andreea Barbulescu
<khristineandreea.barbulescu@oss.nxp.com> wrote:
>
> From: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
>
> The old pinctrl bindings for SIUL2 are deprecated by a previous commit.
> The new bindings for the SIUL2 represent it as an MFD device:
> - one cell for combined pinctrl&GPIO
> - two cella acting as syscon providers for SoC registers access
>
> This commit allows the existing driver to also be probed as an MFD cell.
> The changes only impact the way the driver initializes the regmaps for
> accessing MSCR and IMCR registers.
>
> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com>
> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com>
[..]
> @@ -969,12 +1017,28 @@ int s32_pinctrl_probe(struct platform_device *pdev,
> s32_pinctrl_desc->confops = &s32_pinconf_ops;
> s32_pinctrl_desc->owner = THIS_MODULE;
>
> + ipctl->regions = devm_kcalloc(&pdev->dev, soc_data->mem_regions,
> + sizeof(*ipctl->regions), GFP_KERNEL);
> + if (!ipctl->regions)
> + return -ENOMEM;
> +
> + ipctl->legacy = soc_data->legacy;
> + if (soc_data->legacy)
> + ret = legacy_s32_pinctrl_regmap_init(pdev, ipctl);
> + else
> + ret = s32_pinctrl_mfd_regmap_init(pdev, ipctl);
> +
> + if (ret)
> + return dev_err_probe(&pdev->dev, ret,
> + "Failed to init driver regmap!\n");
> +
> ret = s32_pinctrl_probe_dt(pdev, ipctl);
> if (ret)
> return dev_err_probe(&pdev->dev, ret,
> "Fail to probe dt properties\n");
>
> - ret = devm_pinctrl_register_and_init(&pdev->dev, s32_pinctrl_desc,
> + ret = devm_pinctrl_register_and_init(s32_get_dev(ipctl),
you should better add a child node for your pinctrl mfd device in its
"nxp,s32g2-siul2" parent instead of registering the pinctrl device on
the parent device. This would fix phandle to gpio too
> + s32_pinctrl_desc,
> ipctl, &ipctl->pctl);
> if (ret)
> return dev_err_probe(&pdev->dev, ret,
> diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinctrl-s32g2.c
> index c49d28793b69..2d56ffb1a109 100644
> --- a/drivers/pinctrl/nxp/pinctrl-s32g2.c
> +++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c
> @@ -3,7 +3,7 @@
> * NXP S32G pinctrl driver
> *
> * Copyright 2015-2016 Freescale Semiconductor, Inc.
> - * Copyright 2017-2018, 2020-2022 NXP
> + * Copyright 2017-2018, 2020-2022, 2024-2025 NXP
> * Copyright (C) 2022 SUSE LLC
> */
>
> @@ -762,7 +762,7 @@ static const struct pinctrl_pin_desc s32_pinctrl_pads_siul2[] = {
> S32_PINCTRL_PIN(S32G_IMCR_SIUL_EIRQ31),
> };
>
> -static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> +static const struct s32_pin_range legacy_s32_pin_ranges_siul2[] = {
> /* MSCR pin ID ranges */
> S32_PIN_RANGE(0, 101),
> S32_PIN_RANGE(112, 122),
> @@ -773,27 +773,47 @@ static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> S32_PIN_RANGE(942, 1007),
> };
>
> -static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
> +static const struct s32_pinctrl_soc_data legacy_s32_pinctrl_data = {
> .pins = s32_pinctrl_pads_siul2,
> .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
> - .mem_pin_ranges = s32_pin_ranges_siul2,
> - .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
> + .mem_pin_ranges = legacy_s32_pin_ranges_siul2,
> + .mem_regions = ARRAY_SIZE(legacy_s32_pin_ranges_siul2),
> + .legacy = true,
> };
>
> static const struct of_device_id s32_pinctrl_of_match[] = {
> {
> .compatible = "nxp,s32g2-siul2-pinctrl",
> - .data = &s32_pinctrl_data,
> + .data = &legacy_s32_pinctrl_data,
> },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);
>
> +static const struct s32_pin_range s32_pin_ranges_siul2[] = {
> + /* MSCR pin ID ranges */
> + S32_PIN_RANGE(0, 101),
> + S32_PIN_RANGE(112, 190),
> + /* IMCR pin ID ranges */
> + S32_PIN_RANGE(512, 595),
> + S32_PIN_RANGE(631, 1007),
> +};
> +
> +static const struct s32_pinctrl_soc_data s32_pinctrl_data = {
> + .pins = s32_pinctrl_pads_siul2,
> + .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
> + .mem_pin_ranges = s32_pin_ranges_siul2,
> + .mem_regions = ARRAY_SIZE(s32_pin_ranges_siul2),
> + .legacy = false,
> +};
> +
> static int s32g_pinctrl_probe(struct platform_device *pdev)
> {
> const struct s32_pinctrl_soc_data *soc_data;
>
> soc_data = of_device_get_match_data(&pdev->dev);
> + if (!soc_data)
> + soc_data = &s32_pinctrl_data;
>
> return s32_pinctrl_probe(pdev, soc_data);
> }
> --
> 2.50.1
>
next prev parent reply other threads:[~2026-01-23 13:58 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 11:59 [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module Khristine Andreea Barbulescu
2026-01-21 2:19 ` Rob Herring
2026-02-19 11:36 ` Khristine Andreea Barbulescu
2026-02-20 10:16 ` Krzysztof Kozlowski
2026-02-20 14:36 ` Khristine Andreea Barbulescu
2026-02-20 14:41 ` Krzysztof Kozlowski
2026-02-23 11:51 ` Khristine Andreea Barbulescu
2026-02-23 13:14 ` Krzysztof Kozlowski
2026-02-25 9:40 ` Ghennadi Procopciuc
2026-03-03 13:28 ` Ghennadi Procopciuc
2026-03-13 17:10 ` Krzysztof Kozlowski
2026-03-14 7:31 ` Arnd Bergmann
2026-03-23 7:57 ` Khristine Andreea Barbulescu
2026-03-23 8:07 ` Krzysztof Kozlowski
2026-03-31 7:48 ` Khristine Andreea Barbulescu
2026-03-31 10:11 ` Arnd Bergmann
2026-03-31 13:43 ` Khristine Andreea Barbulescu
2026-03-31 14:08 ` Arnd Bergmann
2026-03-23 15:33 ` Arnd Bergmann
2026-02-20 10:18 ` Krzysztof Kozlowski
2026-02-20 14:14 ` Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 02/10] mfd: nxp-siul2: add support for NXP SIUL2 Khristine Andreea Barbulescu
2026-01-22 18:52 ` Sander Vanheule
2026-01-20 11:59 ` [PATCH v8 03/10] arm64: dts: s32g: change pinctrl node into the new mfd node Khristine Andreea Barbulescu
2026-01-27 9:13 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages Khristine Andreea Barbulescu
2026-01-20 12:04 ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 05/10] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-01-20 12:04 ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell Khristine Andreea Barbulescu
2026-01-20 12:08 ` Bartosz Golaszewski
2026-01-23 13:57 ` Vincent Guittot [this message]
2026-01-20 11:59 ` [PATCH v8 07/10] pinctrl: s32cc: skip syscon child nodes when parsing funcs and groups Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-27 9:14 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 08/10] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-01-23 13:56 ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 09/10] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Khristine Andreea Barbulescu
2026-01-27 9:17 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 10/10] pinctrl: s32cc: set num_custom_params to 0 Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-20 13:45 ` Daniel Baluta
2026-01-20 19:49 ` [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Rob Herring
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to='CAKfTPtD6LOMFGhzG3dhiSQCNbYrGLjBiT83eqz9mmwaDVpNV=w@mail.gmail.com' \
--to=vincent.guittot@linaro.org \
--cc=aisheng.dong@nxp.com \
--cc=aruizrui@redhat.com \
--cc=brgl@bgdev.pl \
--cc=chester62515@gmail.com \
--cc=clizzi@redhat.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=eballetb@redhat.com \
--cc=echanude@redhat.com \
--cc=festevam@gmail.com \
--cc=ghennadi.procopciuc@nxp.com \
--cc=gregkh@linuxfoundation.org \
--cc=imx@lists.linux.dev \
--cc=kernel@pengutronix.de \
--cc=khristineandreea.barbulescu@oss.nxp.com \
--cc=krzk+dt@kernel.org \
--cc=larisa.grigore@nxp.com \
--cc=lee@kernel.org \
--cc=linus.walleij@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mbrugger@suse.com \
--cc=ping.bai@nxp.com \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
--cc=s.hauer@pengutronix.de \
--cc=s32@nxp.com \
--cc=shawnguo@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).