From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: Prabhakar <prabhakar.csengg@gmail.com>,
Linus Walleij <linus.walleij@linaro.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for locking/unlocking the PFC register
Date: Wed, 22 May 2024 14:23:15 +0200 [thread overview]
Message-ID: <CAMuHMdUJXdEG-BQRYNbmhbGCtE+O1uWO0j-PkBaF7S_Qyp8M-Q@mail.gmail.com> (raw)
In-Reply-To: <TY3PR01MB113461F28EA97F494D831267C86112@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi Biju,
On Tue, Apr 23, 2024 at 8:12 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > -----Original Message-----
> > From: Prabhakar <prabhakar.csengg@gmail.com>
> > Sent: Tuesday, April 23, 2024 6:59 PM
> > Subject: [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for
> > locking/unlocking the PFC register
> >
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > On the RZ/G2L SoC, the PFCWE bit controls writing to PFC registers.
> > However, on the RZ/V2H(P) SoC, the PFCWE (REGWE_A on RZ/V2H) bit controls writing to both PFC and
> > PMC registers. Additionally, BIT(7) B0WI is undocumented for the PWPR register on RZ/V2H(P) SoC. To
> > accommodate these differences across SoC variants, introduce the set_pfc_mode() and
> > pm_set_pfc() function pointers.
> >
> > Note, in rzg2l_pinctrl_set_pfc_mode() the pwpr_pfc_unlock() call is now called before PMC
> > read/write and pwpr_pfc_lock() call is now called after PMC read/write this is to keep changes
> > minimal for RZ/V2H(P).
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > ---
> > RFC->v2
> > - Introduced function pointer for (un)lock
> > --- a/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > +++ b/drivers/pinctrl/renesas/pinctrl-rzg2l.c
> > @@ -2688,6 +2699,8 @@ static struct rzg2l_pinctrl_data r9a07g043_data = {
> > .variable_pin_cfg = r9a07g043f_variable_pin_cfg,
> > .n_variable_pin_cfg = ARRAY_SIZE(r9a07g043f_variable_pin_cfg),
> > #endif
> > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
> > };
> >
> > static struct rzg2l_pinctrl_data r9a07g044_data = { @@ -2699,6 +2712,8 @@ static struct
> > rzg2l_pinctrl_data r9a07g044_data = {
> > .n_dedicated_pins = ARRAY_SIZE(rzg2l_dedicated_pins.common) +
> > ARRAY_SIZE(rzg2l_dedicated_pins.rzg2l_pins),
> > .hwcfg = &rzg2l_hwcfg,
> > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
> > };
> >
> > static struct rzg2l_pinctrl_data r9a08g045_data = { @@ -2709,6 +2724,8 @@ static struct
> > rzg2l_pinctrl_data r9a08g045_data = {
> > .n_port_pins = ARRAY_SIZE(r9a08g045_gpio_configs) * RZG2L_PINS_PER_PORT,
> > .n_dedicated_pins = ARRAY_SIZE(rzg3s_dedicated_pins),
> > .hwcfg = &rzg3s_hwcfg,
> > + .pwpr_pfc_unlock = &rzg2l_pwpr_pfc_unlock,
> > + .pwpr_pfc_lock = &rzg2l_pwpr_pfc_lock,
>
> Some memory can be saved by avoiding duplication of data by using
> a single pointer for structure containing function pointers??
>
> struct rzg2l_pinctrl_fns {
> void (*pwpr_pfc_unlock)(struct rzg2l_pinctrl *pctrl);
> void (*pwpr_pfc_lock)(struct rzg2l_pinctrl *pctrl);
> }
So that would replace 3 (4 after adding RZ/V2H support) x 2 pointers in
rzg2l_pinctrl_data structures by 3 (4) pointers in rzg2l_pinctrl_data
structures + 1 (2) x 2 pointers in rzg2l_pinctrl_fns structures, and
code size would increase due to extra pointer dereferences before
each call.
Am I missing something?
Merging rzg2l_pwpr_pfc_{,un}lock() into a single function (taking a
"bool lock" flag) might be a better solution to reduce rzg2l_pinctrl_data size.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2024-05-22 12:23 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-23 17:58 [PATCH v2 00/13] Add PFC support for Renesas RZ/V2H(P) SoC Prabhakar
2024-04-23 17:58 ` [PATCH v2 01/13] dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Remove the check from the object Prabhakar
2024-05-22 9:57 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 02/13] dt-bindings: pinctrl: renesas: Document RZ/V2H(P) SoC Prabhakar
2024-04-24 9:05 ` Geert Uytterhoeven
2024-04-25 9:49 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 03/13] pinctrl: renesas: pinctrl-rzg2l: Allow more bits for pin configuration Prabhakar
2024-05-22 10:19 ` Geert Uytterhoeven
2024-05-28 18:47 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 04/13] pinctrl: renesas: pinctrl-rzg2l: Allow parsing of variable configuration for all architectures Prabhakar
2024-05-22 10:21 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 05/13] pinctrl: renesas: pinctrl-rzg2l: Validate power registers for SD and ETH Prabhakar
2024-05-22 11:53 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 06/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for locking/unlocking the PFC register Prabhakar
2024-04-23 18:12 ` Biju Das
2024-04-25 11:40 ` Lad, Prabhakar
2024-05-22 12:23 ` Geert Uytterhoeven [this message]
2024-05-22 12:40 ` Biju Das
2024-05-28 19:15 ` Lad, Prabhakar
2024-05-22 12:05 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 07/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointer for writing to PMC register Prabhakar
2024-05-22 12:39 ` Geert Uytterhoeven
2024-05-28 19:33 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 08/13] pinctrl: renesas: pinctrl-rzg2l: Add function pointers for reading/writing OEN register Prabhakar
2024-05-22 12:44 ` Geert Uytterhoeven
2024-05-28 19:42 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 09/13] pinctrl: renesas: pinctrl-rzg2l: Add support to configure the slew-rate Prabhakar
2024-05-22 12:51 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 10/13] pinctrl: renesas: pinctrl-rzg2l: Add support to set pulling up/down the pins Prabhakar
2024-05-22 13:14 ` Geert Uytterhoeven
2024-05-28 20:01 ` Lad, Prabhakar
2024-05-22 13:26 ` Geert Uytterhoeven
2024-05-28 20:01 ` Lad, Prabhakar
2024-05-30 7:48 ` claudiu beznea
2024-05-30 10:15 ` Lad, Prabhakar
2024-05-30 10:37 ` Lad, Prabhakar
2024-04-23 17:58 ` [PATCH v2 11/13] pinctrl: renesas: pinctrl-rzg2l: Pass pincontrol device pointer to pinconf_generic_parse_dt_config() Prabhakar
2024-05-22 13:17 ` Geert Uytterhoeven
2024-04-23 17:58 ` [PATCH v2 12/13] pinctrl: renesas: pinctrl-rzg2l: Add support for custom parameters Prabhakar
2024-05-22 13:21 ` Geert Uytterhoeven
2024-05-28 20:07 ` Lad, Prabhakar
2024-04-23 17:59 ` [PATCH v2 13/13] pinctrl: renesas: pinctrl-rzg2l: Add support for RZ/V2H SoC Prabhakar
2024-05-22 15:29 ` Geert Uytterhoeven
2024-05-29 20:32 ` Lad, Prabhakar
2024-05-16 8:02 ` [PATCH v2 00/13] Add PFC support for Renesas RZ/V2H(P) SoC Lad, Prabhakar
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