From: Ghennadi Procopciuc <ghennadi.procopciuc@oss.nxp.com>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Khristine Andreea Barbulescu
<khristineandreea.barbulescu@oss.nxp.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Bartosz Golaszewski <brgl@bgdev.pl>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chester Lin <chester62515@gmail.com>,
Matthias Brugger <mbrugger@suse.com>,
Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>,
Larisa Grigore <larisa.grigore@nxp.com>,
Lee Jones <lee@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
Dong Aisheng <aisheng.dong@nxp.com>, Jacky Bai <ping.bai@nxp.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Alberto Ruiz <aruizrui@redhat.com>,
Christophe Lizzi <clizzi@redhat.com>,
devicetree@vger.kernel.org, Enric Balletbo <eballetb@redhat.com>,
Eric Chanudet <echanude@redhat.com>,
imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
NXP S32 Linux Team <s32@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
"Vincent Guittot devicetree @ vger . kernel . org"
<vincent.guittot@linaro.org>, Rob Herring <robh@kernel.org>
Subject: Re: [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module
Date: Tue, 3 Mar 2026 15:28:34 +0200 [thread overview]
Message-ID: <fca0541b-0b05-4231-98da-06027aefd9c0@oss.nxp.com> (raw)
In-Reply-To: <ba6140bf-237e-4099-af0c-ee404c1719cd@oss.nxp.com>
Hi Krzysztof & Arnd,
On 2/25/2026 11:40 AM, Ghennadi Procopciuc wrote:
[ ...]
> Hi Krzysztof & Arnd,
>
> I still believe that nvmem is a suitable and accurate mechanism for
> describing SoC‑specific identification information, as originally
> proposed in [0], assuming the necessary adjustments are made.
>
> More specifically, instead of modeling software-defined cells, the nvmem
> layout would describe the actual hardware registers backing this
> information. One advantage of this approach is that consumer nodes (for
> example PCIe, Ethernet, or other IPs that need SoC identification data)
> can reference these registers using the standard nvmem-cells /
> nvmem-cell-names mechanism, without introducing custom, per-subsystem
> bindings.
>
> Looking at the nvmem binding documentation [1], it appears that
> individual fields of identification registers (similar to MIDR) could,
> in principle, be exposed using a bits property, for example:
>
> family_letter@4009c004 {
> reg = <0x4009c004 0x4>;
> bits = <31 26>;
> };
>
> That said, an alternative (and arguably more common) approach is to
> expose entire registers as fixed-layout cells, and let consumers decode
> bitfields in software. Below is an example of how this would look when
> embedded in the existing SIUL2 node, without relying on per-field bits
> properties:
>
[...]
> [0]
> https://lore.kernel.org/all/20250710142038.1986052-2-andrei.stefanescu@oss.nxp.com/
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/nvmem/nvmem.yaml#n82
>
Are you comfortable with this proposal?
I'm asking because it was initially considered a viable option, but the
discussion later shifted to the fact that the nvmem cells were
fabricated and did not accurately describe the underlying hardware.
--
Regards,
Ghennadi
next prev parent reply other threads:[~2026-03-03 13:28 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-20 11:59 [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 01/10] dt-bindings: mfd: add support for the NXP SIUL2 module Khristine Andreea Barbulescu
2026-01-21 2:19 ` Rob Herring
2026-02-19 11:36 ` Khristine Andreea Barbulescu
2026-02-20 10:16 ` Krzysztof Kozlowski
2026-02-20 14:36 ` Khristine Andreea Barbulescu
2026-02-20 14:41 ` Krzysztof Kozlowski
2026-02-23 11:51 ` Khristine Andreea Barbulescu
2026-02-23 13:14 ` Krzysztof Kozlowski
2026-02-25 9:40 ` Ghennadi Procopciuc
2026-03-03 13:28 ` Ghennadi Procopciuc [this message]
2026-03-13 17:10 ` Krzysztof Kozlowski
2026-03-14 7:31 ` Arnd Bergmann
2026-03-23 7:57 ` Khristine Andreea Barbulescu
2026-03-23 8:07 ` Krzysztof Kozlowski
2026-03-31 7:48 ` Khristine Andreea Barbulescu
2026-03-31 10:11 ` Arnd Bergmann
2026-03-31 13:43 ` Khristine Andreea Barbulescu
2026-03-31 14:08 ` Arnd Bergmann
2026-03-23 15:33 ` Arnd Bergmann
2026-02-20 10:18 ` Krzysztof Kozlowski
2026-02-20 14:14 ` Khristine Andreea Barbulescu
2026-01-20 11:59 ` [PATCH v8 02/10] mfd: nxp-siul2: add support for NXP SIUL2 Khristine Andreea Barbulescu
2026-01-22 18:52 ` Sander Vanheule
2026-01-20 11:59 ` [PATCH v8 03/10] arm64: dts: s32g: change pinctrl node into the new mfd node Khristine Andreea Barbulescu
2026-01-27 9:13 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 04/10] pinctrl: s32cc: use dev_err_probe() and improve error messages Khristine Andreea Barbulescu
2026-01-20 12:04 ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 05/10] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Khristine Andreea Barbulescu
2026-01-20 12:04 ` Bartosz Golaszewski
2026-01-20 11:59 ` [PATCH v8 06/10] pinctrl: s32g2: change the driver to also be probed as an MFD cell Khristine Andreea Barbulescu
2026-01-20 12:08 ` Bartosz Golaszewski
2026-01-23 13:57 ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 07/10] pinctrl: s32cc: skip syscon child nodes when parsing funcs and groups Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-27 9:14 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 08/10] pinctrl: s32cc: implement GPIO functionality Khristine Andreea Barbulescu
2026-01-23 13:56 ` Vincent Guittot
2026-01-20 11:59 ` [PATCH v8 09/10] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Khristine Andreea Barbulescu
2026-01-27 9:17 ` Linus Walleij
2026-01-20 11:59 ` [PATCH v8 10/10] pinctrl: s32cc: set num_custom_params to 0 Khristine Andreea Barbulescu
2026-01-20 12:16 ` Bartosz Golaszewski
2026-01-20 13:45 ` Daniel Baluta
2026-01-20 19:49 ` [PATCH v8 00/10] gpio: siul2-s32g2: add initial GPIO driver Rob Herring
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