From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Luca Weiss <luca.weiss@fairphone.com>,
Bjorn Andersson <andersson@kernel.org>,
Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
~postmarketos/upstreaming@lists.sr.ht,
phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/5] pinctrl: qcom: Add SM6350 LPASS LPI TLMM
Date: Thu, 29 Jan 2026 00:03:52 +0200 [thread overview]
Message-ID: <x42kgt6442p4gbbmokkqpmfnrr7kt27p244dasbzc5whi7jai5@2q4fn6hu45sw> (raw)
In-Reply-To: <5fcbfcef-5fb4-4d95-b75a-1c425d1c4183@oss.qualcomm.com>
On Wed, Jan 28, 2026 at 01:39:21PM +0100, Konrad Dybcio wrote:
> On 1/28/26 1:26 PM, Luca Weiss wrote:
> > Add support for the pin controller block on SM6350 Low Power Island.
> >
> > Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> > ---
>
> [...]
>
> > +static const struct lpi_pingroup sm6350_groups[] = {
> > + LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),
> > + LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),
> > + LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),
> > + LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),
> > + LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),
> > + LPI_PINGROUP(5, 12, swr_rx_data, _, qua_mi2s_data, _),
> > + LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _),
> > + LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _),
> > + LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _),
> > + LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, _, _),
> > + LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _),
> > + LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _),
> > + LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s2_data, _, _),
> > + LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s2_data, _, _),
> > + LPI_PINGROUP_SLEW_SPARE_1(14, 0, swr_tx_data, _, _, _),
>
> Modulo this odd cookie, it's identical to 8250.. but then it messes with
> all the definitions, so it makes sense to keep it separate
Might be worth to keep it in the same driver...
Anyway,
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
>
> I verified all the functions and slew offsets
>
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> Konrad
--
With best wishes
Dmitry
next prev parent reply other threads:[~2026-01-28 22:03 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-28 12:26 [PATCH 0/5] Add LPASS LPI pin controller support for SM6350 Luca Weiss
2026-01-28 12:26 ` [PATCH 1/5] dt-bindings: pinctrl: qcom: Add SM6350 LPI pinctrl Luca Weiss
2026-01-28 13:38 ` Rob Herring (Arm)
2026-01-28 14:53 ` Luca Weiss
2026-01-28 12:26 ` [PATCH 2/5] pinctrl: qcom: lpass-lpi: Add ability to use SPARE_1 for slew control Luca Weiss
2026-01-28 12:35 ` Konrad Dybcio
2026-01-28 12:26 ` [PATCH 3/5] pinctrl: qcom: Add SM6350 LPASS LPI TLMM Luca Weiss
2026-01-28 12:39 ` Konrad Dybcio
2026-01-28 22:03 ` Dmitry Baryshkov [this message]
2026-01-28 12:26 ` [PATCH 4/5] arm64: dts: qcom: sm6350: add LPASS LPI pin controller Luca Weiss
2026-01-28 22:16 ` Dmitry Baryshkov
2026-01-29 8:32 ` Luca Weiss
2026-01-29 11:19 ` Konrad Dybcio
2026-04-13 8:55 ` Luca Weiss
2026-04-22 13:08 ` Konrad Dybcio
2026-01-28 12:26 ` [PATCH 5/5] arm64: defconfig: Enable LPASS LPI pin controller for SM6350 Luca Weiss
2026-01-28 22:17 ` Dmitry Baryshkov
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