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From: Guenter Roeck <linux@roeck-us.net>
To: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Cc: "Zhang, Rui" <rui.zhang@intel.com>,
	"Wysocki, Rafael J" <rafael.j.wysocki@intel.com>,
	"jdelvare@suse.com" <jdelvare@suse.com>,
	"srinivas.pandruvada@linux.intel.com"
	<srinivas.pandruvada@linux.intel.com>,
	"lukasz.luba@arm.com" <lukasz.luba@arm.com>,
	"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
	"linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
	"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Neri, Ricardo" <ricardo.neri@intel.com>
Subject: Re: [PATCH 3/3] hwmon: (coretemp) Use a model-specific bitmask to read registers
Date: Mon, 15 Apr 2024 05:42:09 -0700	[thread overview]
Message-ID: <d807bb47-7501-4423-9a8f-d51b5349c96b@roeck-us.net> (raw)
In-Reply-To: <20240415011946.GA12551@ranerica-svr.sc.intel.com>

On Sun, Apr 14, 2024 at 06:19:46PM -0700, Ricardo Neri wrote:
> On Sun, Apr 07, 2024 at 08:24:40AM +0000, Zhang, Rui wrote:
> > On Fri, 2024-04-05 at 18:04 -0700, Ricardo Neri wrote:
> > > The Intel Software Development manual defines states the temperature
> > 
> > I failed to parse this, is the above "states" redundant?
> 
> Sorry Rui! I missed this repy.
> 
> Ah, the commit message is wrong. I will do s/defines//
> 
> > 
> > [...]
> > 
> > > digital readout as the bits [22:16] of the
> > > IA32_[PACKAGE]_THERM_STATUS
> > > registers. In recent processor, however, the range is [23:16]. Use a
> > > model-specific bitmask to extract the temperature readout correctly.
> > > 
> > > diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
> > > index 616bd1a5b864..5632e1b1dfb1 100644
> > > --- a/drivers/hwmon/coretemp.c
> > > +++ b/drivers/hwmon/coretemp.c
> > > @@ -17,6 +17,7 @@
> > >  #include <linux/sysfs.h>
> > >  #include <linux/hwmon-sysfs.h>
> > >  #include <linux/err.h>
> > > +#include <linux/intel_tcc.h>
> > >  #include <linux/mutex.h>
> > >  #include <linux/list.h>
> > >  #include <linux/platform_device.h>
> > > @@ -404,6 +405,8 @@ static ssize_t show_temp(struct device *dev,
> > >         tjmax = get_tjmax(tdata, dev);
> > >         /* Check whether the time interval has elapsed */
> > >         if (time_after(jiffies, tdata->last_updated + HZ)) {
> > > +               u32 mask =
> > > intel_tcc_get_temp_mask(is_pkg_temp_data(tdata));
> > > +
> > >                 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax,
> > > &edx);
> > >                 /*
> > >                  * Ignore the valid bit. In all observed cases the
> > > register
> > > @@ -411,7 +414,7 @@ static ssize_t show_temp(struct device *dev,
> > >                  * Return it instead of reporting an error which
> > > doesn't
> > >                  * really help at all.
> > >                  */
> > > -               tdata->temp = tjmax - ((eax >> 16) & 0x7f) * 1000;
> > > +               tdata->temp = tjmax - ((eax >> 16) & mask) * 1000;
> > >                 tdata->last_updated = jiffies;
> > >         }
> > > 
> > Besides this one, we can also convert to use intel_tcc_get_tjmax() in
> > get_tjmax().
> 
> I thought about this, but realized that the bitmask of TjMax is always
> [23:16]; no need for a model check. If anything, intel_tcc_get_tjmax()
> would remove some duplicated code. But coretemp.c would need to depend
> on INTEL_TCC, which seems to be a non-starter.
> 

Calling intel_tcc_get_temp_mask() in practice already introduces that
dependency because it returns a fixed mask if INTEL_TCC is not enabled.
If that doesn't matter, the dynamic mask is unnecessary to start with.

Guenter

      reply	other threads:[~2024-04-15 12:42 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-06  1:04 [PATCH 0/3] drivers: thermal/hwmon: intel: Use model-specific bitmasks for temperature registers Ricardo Neri
2024-04-06  1:04 ` [PATCH 1/3] thermal: intel: intel_tcc: Add model checks " Ricardo Neri
2024-04-07  8:13   ` Zhang, Rui
2024-04-08 14:23     ` Ricardo Neri
2024-04-06  1:04 ` [PATCH 2/3] thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset Ricardo Neri
2024-04-06  1:04 ` [PATCH 3/3] hwmon: (coretemp) Use a model-specific bitmask to read registers Ricardo Neri
2024-04-06 13:17   ` Guenter Roeck
2024-04-07  8:39     ` Zhang, Rui
2024-04-08 11:40       ` Guenter Roeck
2024-04-07  8:24   ` Zhang, Rui
2024-04-15  1:19     ` Ricardo Neri
2024-04-15 12:42       ` Guenter Roeck [this message]

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