From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Damien Le Moal <dlemoal@kernel.org>
Cc: linux-ide@vger.kernel.org, Koba Ko <koba.ko@canonical.com>,
Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list
Date: Mon, 25 Sep 2023 11:05:38 +0300 [thread overview]
Message-ID: <20230925080538.2894982-1-mika.westerberg@linux.intel.com> (raw)
Intel Alder Lake-P AHCI controller needs to be added to the mobile
chipsets list in order to have link power management enabled. Without
this the CPU cannot enter lower power C-states making idle power
consumption high.
Cc: Koba Ko <koba.ko@canonical.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
---
drivers/ata/ahci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 08745e7db820..d96f80b6ff5d 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -423,6 +423,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */
/* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
{ PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
+ { PCI_VDEVICE(INTEL, 0x7ae2), board_ahci_low_power }, /* Alder Lake-P AHCI */
/* JMicron 360/1/3/5/6, match class to avoid IDE function */
{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
--
2.40.1
next reply other threads:[~2023-09-25 8:05 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-09-25 8:05 Mika Westerberg [this message]
2023-09-25 9:09 ` [PATCH] ata: ahci: Add Intel Alder Lake-P AHCI controller to low power chipsets list Damien Le Moal
2023-09-25 9:13 ` Mika Westerberg
2023-09-25 9:27 ` Damien Le Moal
2023-09-26 4:55 ` Koba Ko
2023-10-02 6:21 ` Mika Westerberg
2023-10-03 0:49 ` Damien Le Moal
2023-10-03 4:36 ` Mika Westerberg
2023-10-03 1:00 ` Damien Le Moal
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