* [Patch v3 20/36] metag, irq: Use access helper irq_data_get_affinity_mask()
[not found] <1433145945-789-1-git-send-email-jiang.liu@linux.intel.com>
@ 2015-06-01 8:05 ` Jiang Liu
[not found] ` <1433145945-789-1-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
1 sibling, 0 replies; 3+ messages in thread
From: Jiang Liu @ 2015-06-01 8:05 UTC (permalink / raw
To: Thomas Gleixner, Bjorn Helgaas, Benjamin Herrenschmidt,
Ingo Molnar, H. Peter Anvin, Randy Dunlap, Yinghai Lu,
Borislav Petkov, James Hogan, Jiang Liu
Cc: Konrad Rzeszutek Wilk, Tony Luck, x86, linux-kernel, linux-pci,
linux-acpi, linux-metag
Use access helper irq_data_get_affinity_mask() to hide implementation
details of struct irq_desc.
Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
---
arch/metag/kernel/irq.c | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/metag/kernel/irq.c b/arch/metag/kernel/irq.c
index 4f8f1f87ef11..a336094a7a6c 100644
--- a/arch/metag/kernel/irq.c
+++ b/arch/metag/kernel/irq.c
@@ -270,23 +270,25 @@ void migrate_irqs(void)
for_each_active_irq(i) {
struct irq_data *data = irq_get_irq_data(i);
+ struct cpumask *mask;
unsigned int newcpu;
if (irqd_is_per_cpu(data))
continue;
- if (!cpumask_test_cpu(cpu, data->affinity))
+ mask = irq_data_get_affinity_mask(data);
+ if (!cpumask_test_cpu(cpu, mask))
continue;
- newcpu = cpumask_any_and(data->affinity, cpu_online_mask);
+ newcpu = cpumask_any_and(mask, cpu_online_mask);
if (newcpu >= nr_cpu_ids) {
pr_info_ratelimited("IRQ%u no longer affine to CPU%u\n",
i, cpu);
- cpumask_setall(data->affinity);
+ cpumask_setall(mask);
}
- irq_set_affinity(i, data->affinity);
+ irq_set_affinity(i, mask);
}
}
#endif /* CONFIG_HOTPLUG_CPU */
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [Patch v3 35/36] genirq: Pass irq_data to helper function __irq_set_chip_handler_name_locked()
[not found] ` <1433145945-789-1-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
@ 2015-06-01 8:05 ` Jiang Liu
2015-06-05 8:48 ` Ralf Baechle
0 siblings, 1 reply; 3+ messages in thread
From: Jiang Liu @ 2015-06-01 8:05 UTC (permalink / raw
To: Thomas Gleixner, Bjorn Helgaas, Benjamin Herrenschmidt,
Ingo Molnar, H. Peter Anvin, Randy Dunlap, Yinghai Lu,
Borislav Petkov, Tony Luck, Fenghua Yu, Ralf Baechle,
Linus Walleij, Alexandre Courbot, Michal Simek,
Sören Brinkmann, James Hogan, Jason Cooper, Jiang Liu,
Manuel Lauss, Marc Zyngier
Cc: Konrad Rzeszutek Wilk, x86-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
linux-pci-u79uwXL29TY76Z2rM5mHXA,
linux-acpi-u79uwXL29TY76Z2rM5mHXA,
linux-ia64-u79uwXL29TY76Z2rM5mHXA,
linux-mips-6z/3iImG2C8G8FEW9MqTrA,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-metag-u79uwXL29TY76Z2rM5mHXA
For most cases, callers pass irq_data->irq to helper function
__irq_set_chip_handler_name_locked() and __irq_set_chip_handler_name_locked()
looks up irq_data again by calling irq_get_irq_data(irq_data->irq).
So pass irq_data directly instead of irq_data->irq to
__irq_set_chip_handler_name_locked().
This also helps to better support hierarchy irqdomain in irq core.
Signed-off-by: Jiang Liu <jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
---
arch/ia64/kernel/iosapic.c | 6 +++---
arch/mips/alchemy/common/irq.c | 4 ++--
drivers/gpio/gpio-zynq.c | 9 ++++-----
drivers/irqchip/irq-metag-ext.c | 5 ++---
drivers/irqchip/irq-mips-gic.c | 11 ++++-------
include/linux/irqdesc.h | 7 +++----
6 files changed, 18 insertions(+), 24 deletions(-)
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 4d2698d43c39..317993e92cba 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -610,9 +610,9 @@ register_intr (unsigned int gsi, int irq, unsigned char delivery,
chip->name, irq_type->name);
chip = irq_type;
}
- __irq_set_chip_handler_name_locked(irq, chip, trigger == IOSAPIC_EDGE ?
- handle_edge_irq : handle_level_irq,
- NULL);
+ __irq_set_chip_handler_name_locked(irq_get_irq_data(irq), chip,
+ trigger == IOSAPIC_EDGE ? handle_edge_irq : handle_level_irq,
+ NULL);
return 0;
}
diff --git a/arch/mips/alchemy/common/irq.c b/arch/mips/alchemy/common/irq.c
index 6cb60abfdcc9..026c4eed37d5 100644
--- a/arch/mips/alchemy/common/irq.c
+++ b/arch/mips/alchemy/common/irq.c
@@ -491,7 +491,7 @@ static int au1x_ic_settype(struct irq_data *d, unsigned int flow_type)
default:
ret = -EINVAL;
}
- __irq_set_chip_handler_name_locked(d->irq, chip, handler, name);
+ __irq_set_chip_handler_name_locked(d, chip, handler, name);
wmb();
@@ -703,7 +703,7 @@ static int au1300_gpic_settype(struct irq_data *d, unsigned int type)
return -EINVAL;
}
- __irq_set_chip_handler_name_locked(d->irq, &au1300_gpic, hdl, name);
+ __irq_set_chip_handler_name_locked(d, &au1300_gpic, hdl, name);
au1300_gpic_chgcfg(d->irq - ALCHEMY_GPIC_INT_BASE, GPIC_CFG_IC_MASK, s);
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 184c4b1b2558..aea6075e5b2e 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -422,13 +422,12 @@ static int zynq_gpio_set_irq_type(struct irq_data *irq_data, unsigned int type)
writel_relaxed(int_any,
gpio->base_addr + ZYNQ_GPIO_INTANY_OFFSET(bank_num));
- if (type & IRQ_TYPE_LEVEL_MASK) {
- __irq_set_chip_handler_name_locked(irq_data->irq,
+ if (type & IRQ_TYPE_LEVEL_MASK)
+ __irq_set_chip_handler_name_locked(irq_data,
&zynq_gpio_level_irqchip, handle_fasteoi_irq, NULL);
- } else {
- __irq_set_chip_handler_name_locked(irq_data->irq,
+ else
+ __irq_set_chip_handler_name_locked(irq_data,
&zynq_gpio_edge_irqchip, handle_level_irq, NULL);
- }
return 0;
}
diff --git a/drivers/irqchip/irq-metag-ext.c b/drivers/irqchip/irq-metag-ext.c
index 2cb474ad8809..52e501d8c8f0 100644
--- a/drivers/irqchip/irq-metag-ext.c
+++ b/drivers/irqchip/irq-metag-ext.c
@@ -404,7 +404,6 @@ static int meta_intc_irq_set_type(struct irq_data *data, unsigned int flow_type)
#ifdef CONFIG_METAG_SUSPEND_MEM
struct meta_intc_priv *priv = &meta_intc_priv;
#endif
- unsigned int irq = data->irq;
irq_hw_number_t hw = data->hwirq;
unsigned int bit = 1 << meta_intc_offset(hw);
void __iomem *level_addr = meta_intc_level_addr(hw);
@@ -413,10 +412,10 @@ static int meta_intc_irq_set_type(struct irq_data *data, unsigned int flow_type)
/* update the chip/handler */
if (flow_type & IRQ_TYPE_LEVEL_MASK)
- __irq_set_chip_handler_name_locked(irq, &meta_intc_level_chip,
+ __irq_set_chip_handler_name_locked(data, &meta_intc_level_chip,
handle_level_irq, NULL);
else
- __irq_set_chip_handler_name_locked(irq, &meta_intc_edge_chip,
+ __irq_set_chip_handler_name_locked(data, &meta_intc_edge_chip,
handle_edge_irq, NULL);
/* and clear/set the bit in HWLEVELEXT */
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 09257c301bd2..fb2e64b1f414 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -365,15 +365,12 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
break;
}
- if (is_edge) {
- __irq_set_chip_handler_name_locked(d->irq,
- &gic_edge_irq_controller,
+ if (is_edge)
+ __irq_set_chip_handler_name_locked(d, &gic_edge_irq_controller,
handle_edge_irq, NULL);
- } else {
- __irq_set_chip_handler_name_locked(d->irq,
- &gic_level_irq_controller,
+ else
+ __irq_set_chip_handler_name_locked(d, &gic_level_irq_controller,
handle_level_irq, NULL);
- }
spin_unlock_irqrestore(&gic_lock, flags);
return 0;
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index 41544024f464..4dfa46b99a14 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -177,15 +177,14 @@ static inline void __irq_set_handler_locked(unsigned int irq,
/* caller has locked the irq_desc and both params are valid */
static inline void
-__irq_set_chip_handler_name_locked(unsigned int irq, struct irq_chip *chip,
+__irq_set_chip_handler_name_locked(struct irq_data *data, struct irq_chip *chip,
irq_flow_handler_t handler, const char *name)
{
- struct irq_desc *desc;
+ struct irq_desc *desc = irq_data_to_desc(data);
- desc = irq_to_desc(irq);
- irq_desc_get_irq_data(desc)->chip = chip;
desc->handle_irq = handler;
desc->name = name;
+ data->chip = chip;
}
static inline int irq_balancing_disabled(unsigned int irq)
--
1.7.10.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Patch v3 35/36] genirq: Pass irq_data to helper function __irq_set_chip_handler_name_locked()
2015-06-01 8:05 ` [Patch v3 35/36] genirq: Pass irq_data to helper function __irq_set_chip_handler_name_locked() Jiang Liu
@ 2015-06-05 8:48 ` Ralf Baechle
0 siblings, 0 replies; 3+ messages in thread
From: Ralf Baechle @ 2015-06-05 8:48 UTC (permalink / raw
To: Jiang Liu
Cc: Thomas Gleixner, Bjorn Helgaas, Benjamin Herrenschmidt,
Ingo Molnar, H. Peter Anvin, Randy Dunlap, Yinghai Lu,
Borislav Petkov, Tony Luck, Fenghua Yu, Linus Walleij,
Alexandre Courbot, Michal Simek, Sören Brinkmann,
James Hogan, Jason Cooper, Manuel Lauss, Marc Zyngier,
Konrad Rzeszutek Wilk
On Mon, Jun 01, 2015 at 04:05:44PM +0800, Jiang Liu wrote:
For arch/mips/alchemy/common/irq.c:
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Ralf
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-06-01 8:05 ` [Patch v3 20/36] metag, irq: Use access helper irq_data_get_affinity_mask() Jiang Liu
[not found] ` <1433145945-789-1-git-send-email-jiang.liu-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2015-06-01 8:05 ` [Patch v3 35/36] genirq: Pass irq_data to helper function __irq_set_chip_handler_name_locked() Jiang Liu
2015-06-05 8:48 ` Ralf Baechle
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