From: "Benoît Monin" <benoit.monin@bootlin.com>
To: "Vladimir Kondratiev" <vladimir.kondratiev@mobileye.com>,
"Gregory CLEMENT" <gregory.clement@bootlin.com>,
"Théo Lebrun" <theo.lebrun@bootlin.com>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Paul Walmsley" <pjw@kernel.org>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"Alexandre Ghiti" <alex@ghiti.fr>
Cc: "Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
"Tawfik Bayouk" <tawfik.bayouk@mobileye.com>,
linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-mips@vger.kernel.org,
"Benoît Monin" <benoit.monin@bootlin.com>,
"Brian Masney" <bmasney@redhat.com>
Subject: [PATCH v5 03/10] clk: fixed-factor: Rework initialization with parent clocks
Date: Tue, 17 Mar 2026 14:33:05 +0100 [thread overview]
Message-ID: <20260317-clk-eyeq7-v5-3-6f6daa2c2367@bootlin.com> (raw)
In-Reply-To: <20260317-clk-eyeq7-v5-0-6f6daa2c2367@bootlin.com>
Use the same sequence as clk-divider, clk-gate and other to set the
parent_names, parent_hws and parent_data in the init struct when
registering a fixed-factor clock. The number of parent clocks is now
only set to one if a parent clock is provided.
Previously the number of parent clocks was always one, forcing callers
of __clk_hw_register_fixed_factor() to provide a dummy parent_data
struct with an invalid clock index in case they were not provided with
a non-NULL parent_name or parent_hw. Drop this dummy parent_data as is
not necessary anymore.
This change only has a small impact on mis-configured fixed-factor. Now a
call to clk_hw_register_fixed_factor() with a NULL parent will register
a fixed-factor with zero parent while previously it was registered with
one invalid parent. In both cases the rate of the fixed-factor is 0Hz
but it is no longer shown as orphaned.
This has no impact on properly configured fixed-factors clocks.
Reviewed-by: Brian Masney <bmasney@redhat.com>
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
---
drivers/clk/clk-fixed-factor.c | 28 ++++++++++------------------
1 file changed, 10 insertions(+), 18 deletions(-)
diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c
index 850e8b95f352..359e91441c74 100644
--- a/drivers/clk/clk-fixed-factor.c
+++ b/drivers/clk/clk-fixed-factor.c
@@ -124,13 +124,13 @@ __clk_hw_register_fixed_factor(struct device *dev, struct device_node *np,
init.name = name;
init.ops = &clk_fixed_factor_ops;
init.flags = flags;
- if (parent_name)
- init.parent_names = &parent_name;
- else if (parent_hw)
- init.parent_hws = &parent_hw;
+ init.parent_names = parent_name ? &parent_name : NULL;
+ init.parent_hws = parent_hw ? &parent_hw : NULL;
+ init.parent_data = pdata;
+ if (parent_name || parent_hw || pdata)
+ init.num_parents = 1;
else
- init.parent_data = pdata;
- init.num_parents = 1;
+ init.num_parents = 0;
hw = &fix->hw;
if (dev)
@@ -190,10 +190,8 @@ struct clk_hw *devm_clk_hw_register_fixed_factor_parent_hw(struct device *dev,
const char *name, const struct clk_hw *parent_hw,
unsigned long flags, unsigned int mult, unsigned int div)
{
- const struct clk_parent_data pdata = { .index = -1 };
-
return __clk_hw_register_fixed_factor(dev, NULL, name, NULL, parent_hw,
- &pdata, flags, mult, div, 0, 0, true);
+ NULL, flags, mult, div, 0, 0, true);
}
EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor_parent_hw);
@@ -201,10 +199,8 @@ struct clk_hw *clk_hw_register_fixed_factor_parent_hw(struct device *dev,
const char *name, const struct clk_hw *parent_hw,
unsigned long flags, unsigned int mult, unsigned int div)
{
- const struct clk_parent_data pdata = { .index = -1 };
-
return __clk_hw_register_fixed_factor(dev, NULL, name, NULL, parent_hw,
- &pdata, flags, mult, div, 0, 0, false);
+ NULL, flags, mult, div, 0, 0, false);
}
EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor_parent_hw);
@@ -212,10 +208,8 @@ struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div)
{
- const struct clk_parent_data pdata = { .index = -1 };
-
return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, NULL,
- &pdata, flags, mult, div, 0, 0, false);
+ NULL, flags, mult, div, 0, 0, false);
}
EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
@@ -296,10 +290,8 @@ struct clk_hw *devm_clk_hw_register_fixed_factor(struct device *dev,
const char *name, const char *parent_name, unsigned long flags,
unsigned int mult, unsigned int div)
{
- const struct clk_parent_data pdata = { .index = -1 };
-
return __clk_hw_register_fixed_factor(dev, NULL, name, parent_name, NULL,
- &pdata, flags, mult, div, 0, 0, true);
+ NULL, flags, mult, div, 0, 0, true);
}
EXPORT_SYMBOL_GPL(devm_clk_hw_register_fixed_factor);
--
2.53.0
next prev parent reply other threads:[~2026-03-17 13:33 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-17 13:33 [PATCH v5 00/10] Add clock and reset support for Mobileye EyeQ7H Benoît Monin
2026-03-17 13:33 ` [PATCH v5 01/10] dt-bindings: soc: mobileye: Add EyeQ7H OLB Benoît Monin
2026-03-17 13:33 ` [PATCH v5 02/10] reset: eyeq: Add EyeQ7H compatibles Benoît Monin
2026-03-17 13:33 ` Benoît Monin [this message]
2026-03-17 13:33 ` [PATCH v5 04/10] clk: fixed-factor: Export __clk_hw_register_fixed_factor() Benoît Monin
2026-03-17 13:33 ` [PATCH v5 05/10] clk: eyeq: Prefix the PLL registers with the PLL type Benoît Monin
2026-03-17 13:33 ` [PATCH v5 06/10] clk: eyeq: Introduce a generic clock type Benoît Monin
2026-03-17 13:33 ` [PATCH v5 07/10] clk: eyeq: Convert clocks declaration to eqc_clock Benoît Monin
2026-03-17 13:33 ` [PATCH v5 08/10] clk: eyeq: Drop PLL, dividers, and fixed factors structs Benoît Monin
2026-03-17 13:33 ` [PATCH v5 09/10] clk: eyeq: Add EyeQ7H compatibles Benoît Monin
2026-03-17 13:33 ` [PATCH v5 10/10] MAINTAINERS: Add entry for Mobileye RISC-V SoCs Benoît Monin
2026-03-24 0:38 ` [PATCH v5 00/10] Add clock and reset support for Mobileye EyeQ7H Stephen Boyd
2026-03-25 12:48 ` Benoît Monin
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