From: Rany Hany <rany_hany@riseup.net>
To: linux-mips@vger.kernel.org
Cc: Rany Hany <rany_hany@riseup.net>,
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Subject: [PATCH 0/3] Fix MT7621 restart deadlock
Date: Mon, 6 Apr 2026 02:59:52 +0300 [thread overview]
Message-ID: <20260405235956.79535-1-rany_hany@riseup.net> (raw)
These patches fix an issue on some MT7621 devices where the reboot
hangs. They were submitted to OpenWrt and have been merged.
The first two patches aren't particularly remarkable as they just
align MIPS with ARM behavior and are required for the full fix.
The last patch is the most interesting as it uses CPC to transition
the CPU to clock off state. It is not clear to me why this is required
but without it it ends up hanging. Initially only flushing d-cache
and using TCHalt was attempted but ClkOff appears to be necessary.
This fix was only tested on ASUS RT-AX53U as I don't have other
MT7621 devices with this problem.
Unrelated note:
Sorry I had to resend this as my Thunderbird client was not properly
setup for this. I used imap-send which just caused issues. I am not
sure how I previously setup Thunderbird so that it groups the patches
in one thread.
In any case, I ended up just using send-email as I didn't want to mess
with Thunderbird again.
Rany Hany (3):
MIPS: Stop secondary CPUs before platform restart/halt/poweroff
MIPS: SMP: Wait for secondary CPUs to stop in smp_send_stop()
MIPS: SMP: Properly stop secondary CPUs for restart
arch/mips/kernel/reset.c | 19 ++++++-----
arch/mips/kernel/smp.c | 68 +++++++++++++++++++++++++++++++++++++++-
2 files changed, 78 insertions(+), 9 deletions(-)
--
2.53.0
next reply other threads:[~2026-04-06 0:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-05 23:59 Rany Hany [this message]
2026-04-05 23:59 ` [PATCH 1/3] MIPS: Stop secondary CPUs before platform restart/halt/poweroff Rany Hany
2026-04-05 23:59 ` [PATCH 2/3] MIPS: SMP: Wait for secondary CPUs to stop in smp_send_stop() Rany Hany
2026-04-05 23:59 ` [PATCH 3/3] MIPS: SMP: Properly stop secondary CPUs for restart Rany Hany
2026-05-05 6:48 ` Thomas Bogendoerfer
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