From: Guenter Roeck <linux@roeck-us.net>
To: Ben Widawsky <ben.widawsky@intel.com>
Cc: linux-cxl@vger.kernel.org, linux-acpi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-nvdimm@lists.01.org,
linux-pci@vger.kernel.org, Bjorn Helgaas <helgaas@kernel.org>,
Chris Browy <cbrowy@avery-design.com>,
Christoph Hellwig <hch@infradead.org>,
David Hildenbrand <david@redhat.com>,
David Rientjes <rientjes@google.com>,
Jon Masters <jcm@jonmasters.org>,
Jonathan Cameron <Jonathan.Cameron@Huawei.com>,
Rafael Wysocki <rafael.j.wysocki@intel.com>,
Randy Dunlap <rdunlap@infradead.org>,
"John Groves (jgroves)" <jgroves@micron.com>,
"Kelley, Sean V" <sean.v.kelley@intel.com>
Subject: Re: [PATCH v3 3/9] cxl/mem: Register CXL memX devices
Date: Mon, 15 Feb 2021 08:30:14 -0800 [thread overview]
Message-ID: <20210215163014.GA116265@roeck-us.net> (raw)
In-Reply-To: <20210212222541.2123505-4-ben.widawsky@intel.com>
On Fri, Feb 12, 2021 at 02:25:35PM -0800, Ben Widawsky wrote:
> From: Dan Williams <dan.j.williams@intel.com>
>
> Create the /sys/bus/cxl hierarchy to enumerate:
>
> * Memory Devices (per-endpoint control devices)
>
> * Memory Address Space Devices (platform address ranges with
> interleaving, performance, and persistence attributes)
>
> * Memory Regions (active provisioned memory from an address space device
> that is in use as System RAM or delegated to libnvdimm as Persistent
> Memory regions).
>
> For now, only the per-endpoint control devices are registered on the
> 'cxl' bus. However, going forward it will provide a mechanism to
> coordinate cross-device interleave.
>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> (v2)
arm:allmodconfig, i386:allyesconfig, mips:allmodconfig:
drivers/cxl/mem.c:335:2: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration]
335 | writeq(cmd_reg, cxlm->mbox_regs + CXLDEV_MBOX_CMD_OFFSET);
In file included from <command-line>:
drivers/cxl/mem.c: In function '__cxl_mem_mbox_send_cmd':
include/linux/compiler_types.h:320:38: error: call to '__compiletime_assert_266' declared with attribute error: FIELD_GET: mask is zero
and many similar errors.
Guenter
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next prev parent reply other threads:[~2021-02-15 16:30 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-12 22:25 [PATCH v3 0/9] CXL 2.0 Support Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 1/9] cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpoints Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 2/9] cxl/mem: Find device capabilities Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 3/9] cxl/mem: Register CXL memX devices Ben Widawsky
2021-02-15 16:30 ` Guenter Roeck [this message]
2021-02-12 22:25 ` [PATCH v3 4/9] cxl/mem: Add basic IOCTL interface Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 5/9] cxl/mem: Add a "RAW" send command Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 6/9] cxl/mem: Enable commands via CEL Ben Widawsky
2021-02-14 5:46 ` [PATCH v4 06/09] " Ben Widawsky
2021-02-14 16:10 ` Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 7/9] cxl/mem: Add set of informational commands Ben Widawsky
2021-02-12 22:25 ` [PATCH v3 8/9] MAINTAINERS: Add maintainers of the CXL driver Ben Widawsky
2021-02-12 22:25 ` [RFC PATCH 9/9] cxl/mem: Add payload dumping for debug Ben Widawsky
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