From: Hans Zhang <18255117159@163.com>
To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
kwilczynski@kernel.org, mani@kernel.org,
ilpo.jarvinen@linux.intel.com, jingoohan1@gmail.com
Cc: robh@kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com>
Subject: [PATCH v4 3/3] PCI: dwc: Use common speed conversion function
Date: Sun, 2 Nov 2025 22:32:06 +0800 [thread overview]
Message-ID: <20251102143206.111347-4-18255117159@163.com> (raw)
In-Reply-To: <20251102143206.111347-1-18255117159@163.com>
Replace the private switch-based speed conversion in
dw_pcie_link_set_max_speed() with the public pci_bus_speed2lnkctl2()
function.
This eliminates duplicate conversion logic and ensures consistency with
other PCIe drivers, while handling invalid speeds by falling back to
hardware capabilities.
Signed-off-by: Hans Zhang <18255117159@163.com>
---
drivers/pci/controller/dwc/pcie-designware.c | 18 +++---------------
1 file changed, 3 insertions(+), 15 deletions(-)
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index c644216995f6..20ba314e82d5 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -717,24 +717,12 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci)
ctrl2 = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCTL2);
ctrl2 &= ~PCI_EXP_LNKCTL2_TLS;
- switch (pcie_link_speed[pci->max_link_speed]) {
- case PCIE_SPEED_2_5GT:
- link_speed = PCI_EXP_LNKCTL2_TLS_2_5GT;
- break;
- case PCIE_SPEED_5_0GT:
- link_speed = PCI_EXP_LNKCTL2_TLS_5_0GT;
- break;
- case PCIE_SPEED_8_0GT:
- link_speed = PCI_EXP_LNKCTL2_TLS_8_0GT;
- break;
- case PCIE_SPEED_16_0GT:
- link_speed = PCI_EXP_LNKCTL2_TLS_16_0GT;
- break;
- default:
+ link_speed = pcie_link_speed[pci->max_link_speed];
+ link_speed = pci_bus_speed2lnkctl2(link_speed);
+ if (link_speed == 0) {
/* Use hardware capability */
link_speed = FIELD_GET(PCI_EXP_LNKCAP_SLS, cap);
ctrl2 &= ~PCI_EXP_LNKCTL2_HASD;
- break;
}
dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCTL2, ctrl2 | link_speed);
--
2.34.1
prev parent reply other threads:[~2025-11-02 14:32 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-02 14:32 [PATCH v4 0/3] PCI: Refactor PCIe speed validation and conversion functions Hans Zhang
2025-11-02 14:32 ` [PATCH v4 1/3] PCI: Add public pcie_valid_speed() for shared validation Hans Zhang
2025-11-02 14:32 ` [PATCH v4 2/3] PCI: Move pci_bus_speed2lnkctl2() to public header Hans Zhang
2025-11-02 14:32 ` Hans Zhang [this message]
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