From: Prabhakar <prabhakar.csengg@gmail.com>
To: "Claudiu Beznea" <claudiu.beznea.uj@bp.renesas.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Geert Uytterhoeven" <geert+renesas@glider.be>,
"Magnus Damm" <magnus.damm@gmail.com>,
linux-pci@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Prabhakar <prabhakar.csengg@gmail.com>,
Biju Das <biju.das.jz@bp.renesas.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH v2] dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2N support
Date: Fri, 1 May 2026 11:24:07 +0100 [thread overview]
Message-ID: <20260501102407.29462-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Document the Renesas RZ/V2N PCIe host controller, which is compatible with
the RZ/G3E PCIe IP and therefore uses it as a fallback compatible. The
only difference is that it uses device ID 0x003B.
Make the binding title generic to avoid extending the title for each new
SoC, and update the description to list the supported SoCs and their
capabilities.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
v1->v2:
- Updated the title
- device-id value updated to lowercase
Note this patch was originally sent as part of series [0], as RZ/V2H
support needs discussion sending this single patch. The RZ/V2N support
can be merged independently of RZ/V2H.
[0] https://lore.kernel.org/all/20260318124450.163471-1-prabhakar.mahadev-lad.rj@bp.renesas.com/
---
.../bindings/pci/renesas,r9a08g045-pcie.yaml | 23 ++++++++++++-------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
index a67108c48feb..90086909e921 100644
--- a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml
@@ -4,21 +4,27 @@
$id: http://devicetree.org/schemas/pci/renesas,r9a08g045-pcie.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: Renesas RZ/G3S PCIe host controller
+title: Renesas RZ/G3S PCIe host controller (and similar SoCs)
maintainers:
- Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
-description:
- Renesas RZ/G3{E,S} PCIe host controllers comply with PCIe
- Base Specification 4.0 and support up to 5 GT/s (Gen2) for RZ/G3S and
- up to 8 GT/s (Gen3) for RZ/G3E.
+description: |
+ PCIe host controller found in Renesas RZ/G3S and similar SoCs complies
+ with PCIe Base Specification 4.0 and supports different link speeds
+ depending on the SoC variant:
+ - Gen2 (5 GT/s): RZ/G3S
+ - Gen3 (8 GT/s): RZ/G3E, RZ/V2N
properties:
compatible:
- enum:
- - renesas,r9a08g045-pcie # RZ/G3S
- - renesas,r9a09g047-pcie # RZ/G3E
+ oneOf:
+ - enum:
+ - renesas,r9a08g045-pcie # RZ/G3S
+ - renesas,r9a09g047-pcie # RZ/G3E
+ - items:
+ - const: renesas,r9a09g056-pcie # RZ/V2N
+ - const: renesas,r9a09g047-pcie
reg:
maxItems: 1
@@ -152,6 +158,7 @@ patternProperties:
enum:
- 0x0033
- 0x0039
+ - 0x003b
clocks:
items:
--
2.54.0
next reply other threads:[~2026-05-01 10:24 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-01 10:24 Prabhakar [this message]
2026-05-07 18:35 ` [PATCH v2] dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2N support Rob Herring (Arm)
2026-05-08 7:53 ` Claudiu Beznea
2026-05-15 17:15 ` Manivannan Sadhasivam
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