From: Hans Zhang <18255117159@163.com>
To: bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, s-vadapalli@ti.com,
a-garg7@ti.com
Cc: robh@kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com>
Subject: [PATCH v2 0/3] PCI: cadence: Fix and generalize PCIe capability offset for Root Port
Date: Sat, 9 May 2026 21:07:13 +0800 [thread overview]
Message-ID: <20260509130716.2104103-1-18255117159@163.com> (raw)
The Cadence PCIe controller has two major IP generations: LGA (Legacy)
and HPA. In Root Port mode, their configuration space base addresses
differ (LGA requires an offset of 0x200000, HPA uses 0). Moreover, the
PCI Express Capability structure may not reside at the hardcoded offset
0xC0 across all SoC integrations.
This series fixes the Root Port configuration space accessors to
correctly handle the base offset on LGA IP, then introduces a helper
to dynamically find and cache the PCIe Capability offset, and finally
replaces all hardcoded uses of CDNS_PCIE_RP_CAP_OFFSET with the cached
value.
Patch 1 fixes the fundamental read accessors for RC mode on LGA IP.
Patch 2 adds the caching helper.
Patch 3 removes the hardcoded offset and uses the dynamic one.
These changes have been tested on:
- LGA-based platform (TI J7200, J721E) - confirmed by Aksh Garg.
- HPA-based platform (CIX Sky1) - capability search works normal.
Note: This series depends on the previously submitted "is_hpa" flag
introduction:
https://patchwork.kernel.org/project/linux-pci/patch/20260508034101.1910036-1-18255117159@163.com/
Changes since v1:
- Fixed critical bug in cdns_pcie_get_pcie_cap() where dw_pcie types
were incorrectly used (suggested by Bjorn Helgaas).
- Corrected function comment and parameter description.
- Added defensive check (not included in this version, but recommended).
Hans Zhang (3):
PCI: cadence: Fix Root Port configuration space access for LGA IP
PCI: cadence: Add cdns_pcie_get_pcie_cap() helper and cache capability
offset
PCI: cadence: Use dynamic PCIe capability offset in host driver
.../pci/controller/cadence/pcie-cadence-ep.c | 5 +--
.../cadence/pcie-cadence-host-common.c | 4 +--
.../cadence/pcie-cadence-host-hpa.c | 2 ++
.../controller/cadence/pcie-cadence-host.c | 6 ++--
.../cadence/pcie-cadence-lga-regs.h | 1 -
drivers/pci/controller/cadence/pcie-cadence.h | 31 ++++++++++++++++++-
6 files changed, 41 insertions(+), 8 deletions(-)
base-commit: 917719c412c48687d4a176965d1fa35320ec457c
prerequisite-patch-id: 2db32bc3c7b72f1206f365606060da203bfd683a
prerequisite-patch-id: f37881f3d5564b7bdd5e0aee093a297e3e0a79c0
--
2.34.1
next reply other threads:[~2026-05-09 13:08 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-09 13:07 Hans Zhang [this message]
2026-05-09 13:07 ` [PATCH v2 1/3] PCI: cadence: Fix Root Port configuration space access for LGA IP Hans Zhang
2026-05-09 13:07 ` [PATCH v2 2/3] PCI: cadence: Add cdns_pcie_get_pcie_cap() helper and cache capability offset Hans Zhang
2026-05-11 4:58 ` Aksh Garg
2026-05-09 13:07 ` [PATCH v2 3/3] PCI: cadence: Use dynamic PCIe capability offset in host driver Hans Zhang
2026-05-11 4:47 ` Aksh Garg
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260509130716.2104103-1-18255117159@163.com \
--to=18255117159@163.com \
--cc=a-garg7@ti.com \
--cc=bhelgaas@google.com \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=mani@kernel.org \
--cc=robh@kernel.org \
--cc=s-vadapalli@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).