From: Hans Zhang <18255117159@163.com>
To: bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, vigneshr@ti.com,
jingoohan1@gmail.com, thomas.petazzoni@bootlin.com,
ryder.lee@mediatek.com, claudiu.beznea.uj@bp.renesas.com,
mpillai@cadence.com
Cc: robh@kernel.org, s-vadapalli@ti.com, linux-omap@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, claudiu.beznea@tuxon.dev,
linux-mediatek@lists.infradead.org,
linux-renesas-soc@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com>
Subject: [PATCH v4 7/7] PCI: rzg3s-host: Use common pci_host_common_link_train_delay() helper
Date: Mon, 18 May 2026 08:42:46 +0800 [thread overview]
Message-ID: <20260518004246.1384532-8-18255117159@163.com> (raw)
In-Reply-To: <20260518004246.1384532-1-18255117159@163.com>
Replace the unconditional msleep(100) with the common helper
pci_host_common_link_train_delay(). The helper only waits when
max_link_speed > 2, as required by PCIe r6.0 sec 6.6.1.
This avoids unnecessary delay for Gen1/Gen2 links while retaining
the mandatory 100 ms for higher speeds.
Signed-off-by: Hans Zhang <18255117159@163.com>
---
drivers/pci/controller/pcie-rzg3s-host.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-rzg3s-host.c b/drivers/pci/controller/pcie-rzg3s-host.c
index d86e7516dcc2..66f687304c1c 100644
--- a/drivers/pci/controller/pcie-rzg3s-host.c
+++ b/drivers/pci/controller/pcie-rzg3s-host.c
@@ -35,6 +35,7 @@
#include <linux/slab.h>
#include <linux/units.h>
+#include "pci-host-common.h"
#include "../pci.h"
/* AXI registers */
@@ -1663,7 +1664,7 @@ rzg3s_pcie_host_setup(struct rzg3s_pcie_host *host,
if (ret)
dev_info(dev, "Failed to set max link speed\n");
- msleep(PCIE_RESET_CONFIG_WAIT_MS);
+ pci_host_common_link_train_delay(host->max_link_speed);
return 0;
--
2.43.0
next prev parent reply other threads:[~2026-05-18 0:43 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-18 0:42 [PATCH v4 0/7] PCI: Add common helper for 100 ms delay after link training Hans Zhang
2026-05-18 0:42 ` [PATCH v4 1/7] PCI: Add pci_host_common_link_train_delay() helper Hans Zhang
2026-05-18 1:01 ` sashiko-bot
2026-05-18 0:42 ` [PATCH v4 2/7] PCI: cadence: Add post-link delay for LGA and j721e glue driver Hans Zhang
2026-05-18 1:20 ` sashiko-bot
2026-05-18 2:12 ` Manikandan Karunakaran Pillai
2026-05-18 2:26 ` Hans Zhang
2026-05-18 2:38 ` Manikandan Karunakaran Pillai
2026-05-18 3:03 ` Hans Zhang
2026-05-18 3:17 ` Manikandan Karunakaran Pillai
2026-05-18 0:42 ` [PATCH v4 3/7] PCI: cadence: HPA: Add post-link delay Hans Zhang
2026-05-18 1:36 ` sashiko-bot
2026-05-18 2:16 ` Manikandan Karunakaran Pillai
2026-05-18 2:27 ` Hans Zhang
2026-05-18 0:42 ` [PATCH v4 4/7] PCI: dwc: Use common pci_host_common_link_train_delay() helper Hans Zhang
2026-05-18 1:49 ` sashiko-bot
2026-05-18 0:42 ` [PATCH v4 5/7] PCI: aardvark: Add 100 ms delay after link training Hans Zhang
2026-05-18 2:09 ` sashiko-bot
2026-05-18 0:42 ` [PATCH v4 6/7] PCI: mediatek-gen3: Add 100 ms delay after link up Hans Zhang
2026-05-18 2:30 ` sashiko-bot
2026-05-18 0:42 ` Hans Zhang [this message]
2026-05-18 2:41 ` [PATCH v4 7/7] PCI: rzg3s-host: Use common pci_host_common_link_train_delay() helper sashiko-bot
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