From: Hans Zhang <18255117159@163.com>
To: Aksh Garg <a-garg7@ti.com>,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, mani@kernel.org, hans.zhang@cixtech.com
Cc: robh@kernel.org, mpillai@cadence.com, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org,
Siddharth Vadapalli <s-vadapalli@ti.com>
Subject: Re: [PATCH v4 2/2] PCI: cadence: Add debugfs property to provide LTSSM status of the PCIe link
Date: Wed, 13 May 2026 16:29:09 +0800 [thread overview]
Message-ID: <e0beb3f0-9a70-476c-8571-73f3b567e7bb@163.com> (raw)
In-Reply-To: <1e5b0f09-c04d-47e2-9657-70eab3d0e415@ti.com>
On 5/13/26 16:25, Aksh Garg wrote:
>>> Hi Hans,
>>>
>>> The LTSSM state encoding in your patches do not align with the state
>>> encodings for LGA IP. TI SoCs have LGA IP of Cadence PCIe, and when I
>>> applied your patches, the LTSSM value in the debugfs for the PCIe
>>> subsystem (which have an EP connected to it) came out to be 0x10, which
>>> points to the state "PCIE_L0". However, the debugfs prints the state as
>>> "POLLING_CONFIG_2 (0x10)", which seems to be incorrect.
>>>
>>> The LTSSM state encodings for TI SoCs using Cadence PCIe IP is
>>> provided in the J7200 TRM section 12.2.3.4.14 at:
>>> https://www.ti.com/lit/pdf/spruiu1
>>
>> Hi Aksh,
>>
>> Thank you for the information you provided. Could you please tell me
>> how to read this register? Then I will incorporate it into the next
>> version.
>
> The code to read the LTSSM state for LGA IPs in your patch:
> ```
> reg = cdns_pcie_readl(pci, CDNS_PCIE_LM_BASE);
> ltssm = FIELD_GET(CDNS_PCIE_LGA_LTSSM_STATUS_MASK, reg);
> ```
> correctly reads the LTSSM state for TI SoCs which uses LGA IP.
Hi Aksh,
Thank you.
Best regards,
Hans
prev parent reply other threads:[~2026-05-13 8:30 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-08 3:40 [PATCH v4 0/2] PCI: cadence: Add LTSSM debugfs Hans Zhang
2026-05-08 3:41 ` [PATCH v4 1/2] PCI: cadence: Add HPA architecture flag Hans Zhang
2026-05-08 3:41 ` [PATCH v4 2/2] PCI: cadence: Add debugfs property to provide LTSSM status of the PCIe link Hans Zhang
2026-05-08 4:19 ` sashiko-bot
2026-05-08 4:31 ` Hans Zhang
2026-05-13 5:23 ` Aksh Garg
2026-05-13 6:11 ` Manikandan Karunakaran Pillai
2026-05-13 6:39 ` Hans Zhang
2026-05-13 7:08 ` Manikandan Karunakaran Pillai
2026-05-13 8:34 ` Aksh Garg
2026-05-13 8:55 ` Hans Zhang
2026-05-13 11:30 ` Aksh Garg
2026-05-13 12:04 ` Hans Zhang
2026-05-14 1:39 ` Manikandan Karunakaran Pillai
2026-05-14 1:46 ` Hans Zhang
2026-05-14 4:25 ` Manikandan Karunakaran Pillai
2026-05-13 6:37 ` Hans Zhang
2026-05-13 8:25 ` Aksh Garg
2026-05-13 8:29 ` Hans Zhang [this message]
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