From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Zhang Rui <rui.zhang@intel.com>, Jean Delvare <jdelvare@suse.com>,
Guenter Roeck <linux@roeck-us.net>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
linux-pm@vger.kernel.org, linux-hwmon@vger.kernel.org,
linux-kernel@vger.kernel.org,
Ricardo Neri <ricardo.neri@intel.com>
Subject: [PATCH v2 2/3] thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset
Date: Thu, 25 Apr 2024 10:13:10 -0700 [thread overview]
Message-ID: <20240425171311.19519-3-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20240425171311.19519-1-ricardo.neri-calderon@linux.intel.com>
The TCC offset field in the register MSR_TEMPERATURE_TARGET is not
architectural. The TCC library provides a model-specific bitmask. Use it to
determine the maximum TCC offset.
Suggested-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Lukasz Luba <lukasz.luba@arm.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: linux-hwmon@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: stable@vger.kernel.org # v6.7+
---
Changes since v1:
* Used renamed function intel_tcc_get_offset_mask().
---
drivers/thermal/intel/intel_tcc_cooling.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/intel/intel_tcc_cooling.c b/drivers/thermal/intel/intel_tcc_cooling.c
index 6c392147e6d1..5bfc2b515c78 100644
--- a/drivers/thermal/intel/intel_tcc_cooling.c
+++ b/drivers/thermal/intel/intel_tcc_cooling.c
@@ -20,7 +20,7 @@ static struct thermal_cooling_device *tcc_cdev;
static int tcc_get_max_state(struct thermal_cooling_device *cdev, unsigned long
*state)
{
- *state = 0x3f;
+ *state = intel_tcc_get_offset_mask();
return 0;
}
--
2.34.1
next prev parent reply other threads:[~2024-04-25 17:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-25 17:13 [PATCH v2 0/3] drivers: thermal/hwmon: intel: Use model-specific bitmasks for temperature registers Ricardo Neri
2024-04-25 17:13 ` [PATCH v2 1/3] thermal: intel: intel_tcc: Add model checks " Ricardo Neri
2024-04-29 14:39 ` Zhang, Rui
2024-04-30 19:07 ` Rafael J. Wysocki
2024-05-01 1:24 ` Ricardo Neri
2024-04-25 17:13 ` Ricardo Neri [this message]
2024-04-29 14:39 ` [PATCH v2 2/3] thermal: intel: intel_tcc_cooling: Use a model-specific bitmask for TCC offset Zhang, Rui
2024-04-25 17:13 ` [PATCH v2 3/3] hwmon: (coretemp) Extend the bitmask to read temperature to 0xff Ricardo Neri
2024-04-28 17:01 ` Guenter Roeck
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