From: William Qiu <william.qiu@starfivetech.com>
To: <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-riscv@lists.infradead.org>, <linux-pwm@vger.kernel.org>
Cc: "Emil Renner Berthing" <kernel@esmil.dk>,
"Rob Herring" <robh+dt@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
"Hal Feng" <hal.feng@starfivetech.com>,
"Paul Walmsley" <paul.walmsley@sifive.com>,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Albert Ou" <aou@eecs.berkeley.edu>,
"William Qiu" <william.qiu@starfivetech.com>
Subject: [PATCH v10 1/4] dt-bindings: pwm: Add bindings for OpenCores PWM Controller
Date: Fri, 22 Dec 2023 17:45:45 +0800 [thread overview]
Message-ID: <20231222094548.54103-2-william.qiu@starfivetech.com> (raw)
In-Reply-To: <20231222094548.54103-1-william.qiu@starfivetech.com>
Add bindings for OpenCores PWM Controller.
Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
---
.../bindings/pwm/opencores,pwm.yaml | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
new file mode 100644
index 000000000000..0b85dd861dfd
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: OpenCores PWM controller
+
+maintainers:
+ - William Qiu <william.qiu@starfivetech.com>
+
+description:
+ The OpenCores PTC ip core contains a PWM controller. When operating in PWM
+ mode, the PTC core generates binary signal with user-programmable low and
+ high periods. All PTC counters and registers are 32-bit.
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - starfive,jh7100-pwm
+ - starfive,jh7110-pwm
+ - const: opencores,pwm-v1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 3
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ pwm@12490000 {
+ compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
+ reg = <0x12490000 0x10000>;
+ clocks = <&clkgen 181>;
+ resets = <&rstgen 109>;
+ #pwm-cells = <3>;
+ };
--
2.34.1
next prev parent reply other threads:[~2023-12-22 9:45 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-22 9:45 [PATCH v10 0/4] StarFive's Pulse Width Modulation driver support William Qiu
2023-12-22 9:45 ` William Qiu [this message]
2024-01-04 22:43 ` [PATCH v10 1/4] dt-bindings: pwm: Add bindings for OpenCores PWM Controller Uwe Kleine-König
2024-01-08 21:03 ` Uwe Kleine-König
2024-01-09 17:15 ` Conor Dooley
2023-12-22 9:45 ` [PATCH v10 2/4] pwm: opencores: Add PWM driver support William Qiu
2024-01-03 7:15 ` William Qiu
2024-01-03 12:22 ` Uwe Kleine-König
2024-01-04 22:40 ` Uwe Kleine-König
2024-01-05 8:02 ` William Qiu
2023-12-22 9:45 ` [PATCH v10 3/4] riscv: dts: starfive: jh7100: Add PWM node and pins configuration William Qiu
2023-12-24 10:49 ` Emil Renner Berthing
2024-01-04 22:46 ` Uwe Kleine-König
2024-01-05 13:18 ` Emil Renner Berthing
2024-01-08 17:31 ` Conor Dooley
2023-12-22 9:45 ` [PATCH v10 4/4] riscv: dts: starfive: jh7110: " William Qiu
2023-12-24 10:50 ` Emil Renner Berthing
2024-01-22 16:50 ` (subset) [PATCH v10 0/4] StarFive's Pulse Width Modulation driver support Conor Dooley
2024-01-22 16:55 ` Conor Dooley
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