From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Jaewon Kim <jaewon02.kim@samsung.com>,
Alim Akhtar <alim.akhtar@samsung.com>,
Rob Herring <robh+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Tomasz Figa <tomasz.figa@gmail.com>,
Sylwester Nawrocki <s.nawrocki@samsung.com>,
Linus Walleij <linus.walleij@linaro.org>,
Thierry Reding <thierry.reding@gmail.com>,
Uwe Kleine-K?nig <u.kleine-koenig@pengutronix.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
linux-pwm@vger.kernel.org, linux-serial@vger.kernel.org
Subject: Re: [PATCH v4 2/2] pinctrl: samsung: add exynosautov920 pinctrl
Date: Wed, 13 Dec 2023 08:52:03 +0100 [thread overview]
Message-ID: <68a36910-e528-45ff-8b59-e7cd95aaef0b@linaro.org> (raw)
In-Reply-To: <20231211114145.106255-3-jaewon02.kim@samsung.com>
On 11/12/2023 12:41, Jaewon Kim wrote:
> Add pinctrl data for ExynosAutov920 SoC.
> It has a newly applied pinctrl register layer for ExynosAuto series.
>
> Pinctrl data for ExynosAutoV920 SoC.
> - GPA0,GPA1 (10): External wake up interrupt
> - GPQ0 (2): SPMI (PMIC I/F)
> - GPB0,GPB1,GPB2,GPB3,GPB4,GPB5,GPB6 (47): I2S Audio
> - GPH0,GPH1,GPH2,GPH3,GPH4,GPH5,GPH6,GPH8 (49): PCIE, UFS, Ethernet
> - GPG0,GPG1,GPG2,GPG3,GPG4,GPG5 (29): General purpose
> - GPP0,GPP1,GPP2,GPP3,GPP4,GPP5,GPP6,GPP7,GPP8,GPP9,GPP10 (77): USI
>
> Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com>
> ---
> .../pinctrl/samsung/pinctrl-exynos-arm64.c | 140 ++++++++++++++++++
> drivers/pinctrl/samsung/pinctrl-exynos.c | 23 ++-
> drivers/pinctrl/samsung/pinctrl-exynos.h | 25 ++++
> drivers/pinctrl/samsung/pinctrl-samsung.c | 2 +
> drivers/pinctrl/samsung/pinctrl-samsung.h | 1 +
> 5 files changed, 190 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> index cb965cf93705..a998c296dd05 100644
> --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c
> @@ -796,3 +796,143 @@ const struct samsung_pinctrl_of_match_data fsd_of_data __initconst = {
> .ctrl = fsd_pin_ctrl,
> .num_ctrl = ARRAY_SIZE(fsd_pin_ctrl),
> };
> +
> +/* pin banks of exynosautov920 pin-controller 0 (ALIVE) */
> +static const struct samsung_pin_bank_data exynosautov920_pin_banks0[] = {
> + EXYNOSV920_PIN_BANK_EINTW(8, 0x0000, "gpa0", 0x18, 0x24, 0x28),
> + EXYNOSV920_PIN_BANK_EINTW(2, 0x1000, "gpa1", 0x18, 0x20, 0x24),
> + EXYNOS850_PIN_BANK_EINTN(2, 0x2000, "gpq0"),
> +};
Applied with re-ordering it, to keep it after ExynosAutov9. For the
future: don't add entries to the end of lists because it causes exactly
this issue we have here: unnecessary conflicts. Please keep this rule
for entire development, not only pinctrl.
If both you and Peter were observing this basic rule, I would not have
work of reshuffling and fixing conflicts.
Please check the result if I reshuffled/solved conflicts correctly.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-12-13 7:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20231211114215epcas2p226d66c6dd01a4414559272c648c3d464@epcas2p2.samsung.com>
2023-12-11 11:41 ` [PATCH v4 0/2] Introduce ExynosAutov920 SoC and SADK board Jaewon Kim
[not found] ` <CGME20231211114215epcas2p21c9a1c2157cd1650f5ec12487eddb576@epcas2p2.samsung.com>
2023-12-11 11:41 ` [PATCH v4 1/2] pinctrl: samsung: support ExynosAuto GPIO structure Jaewon Kim
[not found] ` <CGME20231211114216epcas2p300bbf4c592d495991c6cc2d96e0b1f85@epcas2p3.samsung.com>
2023-12-11 11:41 ` [PATCH v4 2/2] pinctrl: samsung: add exynosautov920 pinctrl Jaewon Kim
2023-12-13 7:52 ` Krzysztof Kozlowski [this message]
2023-12-13 8:10 ` Jaewon Kim
2023-12-13 8:14 ` Krzysztof Kozlowski
2023-12-13 7:50 ` [PATCH v4 0/2] Introduce ExynosAutov920 SoC and SADK board Krzysztof Kozlowski
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