From: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
To: Chen Wang <unicorn_wang@outlook.com>
Cc: ukleinek@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, dlan@gentoo.org, linux-pwm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 0/2] riscv: pwm: sophgo: add pwm support for CV1800
Date: Sat, 4 May 2024 14:49:54 +0800 [thread overview]
Message-ID: <CAJRtX8SRudWy7q-ON3L-oTjQo8+GCKPX9_sP8Dq8p3t915yvMQ@mail.gmail.com> (raw)
In-Reply-To: <PN1P287MB2818F3818BEBE875C460F158FE1F2@PN1P287MB2818.INDP287.PROD.OUTLOOK.COM>
On Fri, May 3, 2024 at 9:47 AM Chen Wang <unicorn_wang@outlook.com> wrote:
>
> Hi, Jingbao,
>
> This patchset should also be sent to the linux-riscv mailinglist.
I will do that.
>
> On 2024/5/1 16:32, Jingbao Qiu wrote:
> > The Sophgo CV1800 chip provides a set of four independent
> > PWM channel outputs.
> > This series adds PWM controller support for Sophgo cv1800.
> >
> > Changes since v6:
> > - add detailed Limitations
> > - using BIT(n) instead BIT(0) << n
> > - use 0 instead of disable macro
> > - modify OE judgment criteria
> > - add devm_regmap_init_mmio error message
> > - delete unused variable
> >
> > v6: https://lore.kernel.org/all/20240406063413.3334639-1-qiujingbao.dlmu@gmail.com/
> >
> > Changes since v5:
> > - delete the OE function because we plan to use the counter subsystem
> > instead of capture, so there is no need to reuse this code.
> > - fix set polarity reverse error.
> >
> > v5: https://lore.kernel.org/all/20240314100131.323540-1-qiujingbao.dlmu@gmail.com/
> >
> > Changes since v4:
> > - drop filename
> > - fix macro
> > - optimize cv1800_pwm_set_polarity()
> > - optimize cv1800_pwm_set_oe()
> > - add comment for cv1800_pwm_set_oe()
> > - use ticks replace tem
> > - fix duty_cycle larger than period_val
> > - use devm_clk_rate_exclusive_get() replace
> > clk_rate_exclusive_get()
> > - map linux polarity to register polarity
> >
> > v4: https://lore.kernel.org/all/20240304085933.1246964-1-qiujingbao.dlmu@gmail.com/
> >
> > datasheet Link: https://github.com/milkv-duo/duo-files/blob/main/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
> > page 614
> >
> > Changes since v3:
> > - use macro instead of npwm number
> > - add support for polarity feature
> > - add support for Output-Enable/OE feature
> >
> > v3: https://lore.kernel.org/all/20240223082014.109385-1-qiujingbao.dlmu@gmail.com/
> >
> > Changes since v2:
> > - use 0x08 instead of macro
> > - split if statements based on conditions
> > - in order to round up, first calculate the
> > number of high-level cycles, then subtract
> > it from the PERIOD to obtain the number of HLPERIOD
> > - use new pwmchip_alloc() API instead of old style
> >
> > v2: https://lore.kernel.org/all/20240212121729.1086718-1-qiujingbao.dlmu@gmail.com/
> >
> > Changes since v1:
> > - drop full stop from subject
> > - re-order maintainers and description
> > - pass checkpatch.pl --strict
> > - fix naming errors
> > - add "Limitations" section
> > - use a driver specific prefix for all defines
> > - using bool instead u32 in cv1800_pwm_enable
> > - check and set state->polarity
> > - use mul_u64_u64_div_u64
> > - use clk_rate_exclusive_get(), balance with clk_rate_exclusive_put()
> > - using macro definitions instead of shift operations
> > - remove shift operation on 0
> > - use priv replace cv_pwm
> > - hardcode npwm
> > - set atomic to true
> > - remove MODULE_ALIAS
> >
> > v1: https://lore.kernel.org/all/20240207055856.672184-1-qiujingbao.dlmu@gmail.com/
> >
> > Jingbao Qiu (2):
> > dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC
> > pwm: sophgo: add pwm support for Sophgo CV1800 SoC
> >
> > .../bindings/pwm/sophgo,cv1800-pwm.yaml | 45 +++
> > drivers/pwm/Kconfig | 10 +
> > drivers/pwm/Makefile | 1 +
> > drivers/pwm/pwm-cv1800.c | 293 ++++++++++++++++++
> > 4 files changed, 349 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pwm/sophgo,cv1800-pwm.yaml
> > create mode 100644 drivers/pwm/pwm-cv1800.c
> >
> >
> > base-commit: 32c44e1fa921aebf8a5ef9f778534a30aab39313
Best regards
Jingbao Qiu
prev parent reply other threads:[~2024-05-04 6:50 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-01 8:32 [PATCH v7 0/2] riscv: pwm: sophgo: add pwm support for CV1800 Jingbao Qiu
2024-05-01 8:32 ` [PATCH v7 1/2] dt-bindings: pwm: sophgo: add pwm for Sophgo CV1800 series SoC Jingbao Qiu
2024-05-01 8:32 ` [PATCH v7 2/2] pwm: sophgo: add pwm support for Sophgo CV1800 SoC Jingbao Qiu
2024-05-03 1:47 ` [PATCH v7 0/2] riscv: pwm: sophgo: add pwm support for CV1800 Chen Wang
2024-05-04 6:49 ` Jingbao Qiu [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAJRtX8SRudWy7q-ON3L-oTjQo8+GCKPX9_sP8Dq8p3t915yvMQ@mail.gmail.com \
--to=qiujingbao.dlmu@gmail.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=dlan@gentoo.org \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pwm@vger.kernel.org \
--cc=robh@kernel.org \
--cc=ukleinek@kernel.org \
--cc=unicorn_wang@outlook.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).