From: Geert Uytterhoeven <geert@linux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Magnus Damm <magnus.damm@gmail.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-renesas-soc@vger.kernel.org,
linux-riscv@lists.infradead.org,
Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: Re: [PATCH v2 2/5] irqchip/renesas-rzg2l: Add support for RZ/Five SoC
Date: Fri, 19 Apr 2024 09:44:25 +0200 [thread overview]
Message-ID: <CAMuHMdWCHD+AuP9v2fBygDv-fJqP4RZ=Gtp3PX9b1K-GX1+XQg@mail.gmail.com> (raw)
In-Reply-To: <CA+V-a8t6B3pGjrciDNRzdpGQp-8cGW0JXV9k0udpku3GVA0ckA@mail.gmail.com>
Hi Prabhakar,
On Fri, Apr 19, 2024 at 9:15 AM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Thu, Apr 18, 2024 at 4:11 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > On Wed, Apr 3, 2024 at 10:36 PM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > The IX45 block has additional mask registers (NMSK/IMSK/TMSK) as compared
> > > to the RZ/G2L (family) SoC.
> > >
> > > Introduce masking/unmasking support for IRQ and TINT interrupts in IRQC
> > > controller driver. Two new registers, IMSK and TMSK, are defined to
> > > handle masking on RZ/Five SoC. The implementation utilizes a new data
> > > structure, `struct rzg2l_irqc_data`, to determine mask support for a
> > > specific controller instance.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > v1->v2
> > > - Added IRQCHIP_MATCH() for RZ/Five
> > > - Retaining a copy of OF data in priv
> > > - Rebased the changes
> >
> > Thanks for the update!
> >
> > > --- a/drivers/irqchip/irq-renesas-rzg2l.c
> > > +++ b/drivers/irqchip/irq-renesas-rzg2l.c
> > > @@ -66,15 +68,25 @@ struct rzg2l_irqc_reg_cache {
> > > u32 titsr[2];
> > > };
> > >
> > > +/**
> > > + * struct rzg2l_irqc_of_data - OF data structure
> > > + * @mask_supported: Indicates if mask registers are available
> > > + */
> > > +struct rzg2l_irqc_of_data {
> > > + bool mask_supported;
> > > +};
> > > +
> > > /**
> > > * struct rzg2l_irqc_priv - IRQ controller private data structure
> > > * @base: Controller's base address
> > > + * @data: OF data pointer
> > > * @fwspec: IRQ firmware specific data
> > > * @lock: Lock to serialize access to hardware registers
> > > * @cache: Registers cache for suspend/resume
> > > */
> > > static struct rzg2l_irqc_priv {
> > > void __iomem *base;
> > > + const struct rzg2l_irqc_of_data *data;
> >
> > That's not a copy, but a pointer.
> >
> Oops, should that be OK or shall I create a copy instead?
If you would use a copy, all SoC-specific rzg2l_irqc_of_data structures
could become __initconst.
However, depending on how far you want to go with the irq_chip
separation, you may no longer need this field anyway.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2024-04-19 7:44 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-03 20:34 [PATCH v2 0/5] Add IAX45 support for RZ/Five SoC Prabhakar
2024-04-03 20:34 ` [PATCH v2 1/5] dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document " Prabhakar
2024-04-04 6:28 ` Krzysztof Kozlowski
2024-04-18 14:34 ` Geert Uytterhoeven
2024-04-03 20:35 ` [PATCH v2 2/5] irqchip/renesas-rzg2l: Add support for " Prabhakar
2024-04-04 7:44 ` Biju Das
2024-04-04 13:26 ` Lad, Prabhakar
2024-04-04 13:31 ` Biju Das
2024-04-04 13:34 ` Lad, Prabhakar
2024-04-18 15:13 ` Geert Uytterhoeven
2024-04-19 7:16 ` Lad, Prabhakar
2024-04-18 15:11 ` Geert Uytterhoeven
2024-04-19 7:15 ` Lad, Prabhakar
2024-04-19 7:44 ` Geert Uytterhoeven [this message]
2024-04-03 20:35 ` [PATCH v2 3/5] riscv: dts: renesas: r9a07g043f: Add IRQC node to RZ/Five SoC DTSI Prabhakar
2024-04-18 14:57 ` Geert Uytterhoeven
2024-04-03 20:35 ` [PATCH v2 4/5] arm64: dts: renesas: r9a07g043: Move interrupt-parent property to common DTSI Prabhakar
2024-04-03 20:35 ` [PATCH v2 5/5] riscv: dts: renesas: rzfive-smarc-som: Drop deleting interrupt properties from ETH0/1 nodes Prabhakar
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