From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: "magnus.damm@gmail.com" <magnus.damm@gmail.com>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>
Subject: Re: [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes
Date: Thu, 25 Apr 2024 09:56:34 +0200 [thread overview]
Message-ID: <CAMuHMdXeBL8damhb2sc=7W-5iVhughaaEG1nLOTA7E95d=_jVQ@mail.gmail.com> (raw)
In-Reply-To: <TYCPR01MB1104036FAC0CB1C53095178A0D8172@TYCPR01MB11040.jpnprd01.prod.outlook.com>
Hi Shimoda-san,
On Thu, Apr 25, 2024 at 9:35 AM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> > From: Geert Uytterhoeven, Sent: Thursday, April 25, 2024 4:21 PM
> > On Thu, Mar 14, 2024 at 2:56 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
> > > On Thu, Feb 29, 2024 at 1:07 PM Yoshihiro Shimoda
> > > <yoshihiro.shimoda.uh@renesas.com> wrote:
> > > > Add PCIe Host and Endpoint nodes for R-Car V4H (R8A779G0).
> > > >
> > > > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> >
> > > > --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi
> > > > @@ -723,6 +737,126 @@ hscif3: serial@e66a0000 {
> > > > status = "disabled";
> > > > };
> > > >
> > > > + pciec0: pcie@e65d0000 {
> >
> > > > + interrupt-map = <0 0 0 1 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 2 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 3 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 4 &gic GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>;
> > >
> > > s/416/449 for all four lines.
> > >
> > > > + snps,enable-cdm-check;
> > > > + status = "disabled";
> > > > + };
> > > > +
> > > > + pciec1: pcie@e65d8000 {
> >
> > > > + interrupt-map = <0 0 0 1 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 2 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 3 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
> > > > + <0 0 0 4 &gic GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>;
> > >
> > > s/423/456 for all four lines.
> > >
> > > > + snps,enable-cdm-check;
> > > > + status = "disabled";
> > > > + };
> >
> > Do you foresee more changes, and plan to repost, or can I fix the
> > interrupt numbers while applying this series?
>
> Thank you for asking me about this. I intended to repost a fixed patch after PCIe patch series
> was merged into PCI subsystem. Otherwise, dtbs_check will detect missing the compatible
> "renesas,r8a779g0-pcie" in the dt-binding doc. But, it's under review now [1].
>
> [1] https://patchwork.kernel.org/project/linux-pci/list/?series=844512
That's not a real blocker.
But I just realized the DTS (at least the second patch enabling PCIe on
White-Hawk) has a hard dependency on the driver changes, so it has to wait.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2024-04-25 7:56 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-29 12:07 [PATCH 0/2] arm64: dts: renesas: r8a779g0: add PCIe support Yoshihiro Shimoda
2024-02-29 12:07 ` [PATCH 1/2] arm64: dts: renesas: r8a779g0: Add PCIe Host and Endpoint nodes Yoshihiro Shimoda
2024-03-14 13:56 ` Geert Uytterhoeven
2024-04-25 7:20 ` Geert Uytterhoeven
2024-04-25 7:34 ` Yoshihiro Shimoda
2024-04-25 7:56 ` Geert Uytterhoeven [this message]
2024-02-29 12:07 ` [PATCH 2/2] arm64: dts: renesas: white-hawk-cpu-common: Enable PCIe Host ch0 Yoshihiro Shimoda
2024-03-14 14:08 ` Geert Uytterhoeven
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