From: Alexandre Ghiti <alexandre.ghiti@canonical.com>
To: Jonathan Corbet <corbet@lwn.net>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Zong Li <zong.li@sifive.com>,
Anup Patel <anup@brainfault.org>,
Atish Patra <Atish.Patra@rivosinc.com>,
Christoph Hellwig <hch@lst.de>,
Andrey Ryabinin <ryabinin.a.a@gmail.com>,
Alexander Potapenko <glider@google.com>,
Andrey Konovalov <andreyknvl@gmail.com>,
Dmitry Vyukov <dvyukov@google.com>,
Ard Biesheuvel <ardb@kernel.org>, Arnd Bergmann <arnd@arndb.de>,
Kees Cook <keescook@chromium.org>,
Guo Ren <guoren@linux.alibaba.com>,
Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
Mayuresh Chitale <mchitale@ventanamicro.com>,
panqinglin2020@iscas.ac.cn, linux-doc@vger.kernel.org,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
kasan-dev@googlegroups.com, linux-efi@vger.kernel.org,
linux-arch@vger.kernel.org
Cc: Alexandre Ghiti <alexandre.ghiti@canonical.com>
Subject: [PATCH v3 04/13] riscv: Allow to dynamically define VA_BITS
Date: Mon, 6 Dec 2021 11:46:48 +0100 [thread overview]
Message-ID: <20211206104657.433304-5-alexandre.ghiti@canonical.com> (raw)
In-Reply-To: <20211206104657.433304-1-alexandre.ghiti@canonical.com>
With 4-level page table folding at runtime, we don't know at compile time
the size of the virtual address space so we must set VA_BITS dynamically
so that sparsemem reserves the right amount of memory for struct pages.
Signed-off-by: Alexandre Ghiti <alexandre.ghiti@canonical.com>
---
arch/riscv/Kconfig | 10 ----------
arch/riscv/include/asm/kasan.h | 2 +-
arch/riscv/include/asm/pgtable.h | 10 ++++++++--
arch/riscv/include/asm/sparsemem.h | 6 +++++-
4 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 6cd98ade5ebc..c3a167eea011 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -146,16 +146,6 @@ config MMU
Select if you want MMU-based virtualised addressing space
support by paged memory management. If unsure, say 'Y'.
-config VA_BITS
- int
- default 32 if 32BIT
- default 39 if 64BIT
-
-config PA_BITS
- int
- default 34 if 32BIT
- default 56 if 64BIT
-
config PAGE_OFFSET
hex
default 0xC0000000 if 32BIT && MAXPHYSMEM_1GB
diff --git a/arch/riscv/include/asm/kasan.h b/arch/riscv/include/asm/kasan.h
index 2788e2c46609..743e6ff57996 100644
--- a/arch/riscv/include/asm/kasan.h
+++ b/arch/riscv/include/asm/kasan.h
@@ -27,7 +27,7 @@
*/
#define KASAN_SHADOW_SCALE_SHIFT 3
-#define KASAN_SHADOW_SIZE (UL(1) << ((CONFIG_VA_BITS - 1) - KASAN_SHADOW_SCALE_SHIFT))
+#define KASAN_SHADOW_SIZE (UL(1) << ((VA_BITS - 1) - KASAN_SHADOW_SCALE_SHIFT))
#define KASAN_SHADOW_START (KASAN_SHADOW_END - KASAN_SHADOW_SIZE)
#define KASAN_SHADOW_END MODULES_LOWEST_VADDR
#define KASAN_SHADOW_OFFSET _AC(CONFIG_KASAN_SHADOW_OFFSET, UL)
diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgtable.h
index d34f3a7a9701..e1a52e22ad7e 100644
--- a/arch/riscv/include/asm/pgtable.h
+++ b/arch/riscv/include/asm/pgtable.h
@@ -50,8 +50,14 @@
* struct pages to map half the virtual address space. Then
* position vmemmap directly below the VMALLOC region.
*/
+#ifdef CONFIG_64BIT
+#define VA_BITS 39
+#else
+#define VA_BITS 32
+#endif
+
#define VMEMMAP_SHIFT \
- (CONFIG_VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
+ (VA_BITS - PAGE_SHIFT - 1 + STRUCT_PAGE_MAX_SHIFT)
#define VMEMMAP_SIZE BIT(VMEMMAP_SHIFT)
#define VMEMMAP_END (VMALLOC_START - 1)
#define VMEMMAP_START (VMALLOC_START - VMEMMAP_SIZE)
@@ -653,7 +659,7 @@ static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
* and give the kernel the other (upper) half.
*/
#ifdef CONFIG_64BIT
-#define KERN_VIRT_START (-(BIT(CONFIG_VA_BITS)) + TASK_SIZE)
+#define KERN_VIRT_START (-(BIT(VA_BITS)) + TASK_SIZE)
#else
#define KERN_VIRT_START FIXADDR_START
#endif
diff --git a/arch/riscv/include/asm/sparsemem.h b/arch/riscv/include/asm/sparsemem.h
index 45a7018a8118..63acaecc3374 100644
--- a/arch/riscv/include/asm/sparsemem.h
+++ b/arch/riscv/include/asm/sparsemem.h
@@ -4,7 +4,11 @@
#define _ASM_RISCV_SPARSEMEM_H
#ifdef CONFIG_SPARSEMEM
-#define MAX_PHYSMEM_BITS CONFIG_PA_BITS
+#ifdef CONFIG_64BIT
+#define MAX_PHYSMEM_BITS 56
+#else
+#define MAX_PHYSMEM_BITS 34
+#endif /* CONFIG_64BIT */
#define SECTION_SIZE_BITS 27
#endif /* CONFIG_SPARSEMEM */
--
2.32.0
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next prev parent reply other threads:[~2021-12-06 10:52 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-06 10:46 [PATCH v3 00/13] Introduce sv48 support without relocatable kernel Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 01/13] riscv: Move KASAN mapping next to the kernel mapping Alexandre Ghiti
2021-12-06 16:18 ` Jisheng Zhang
2021-12-06 10:46 ` [PATCH v3 02/13] riscv: Split early kasan mapping to prepare sv48 introduction Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 03/13] riscv: Introduce functions to switch pt_ops Alexandre Ghiti
2021-12-06 10:46 ` Alexandre Ghiti [this message]
2021-12-06 10:46 ` [PATCH v3 05/13] riscv: Get rid of MAXPHYSMEM configs Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 06/13] asm-generic: Prepare for riscv use of pud_alloc_one and pud_free Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 07/13] riscv: Implement sv48 support Alexandre Ghiti
2021-12-06 11:05 ` Alexandre ghiti
2021-12-09 4:32 ` 潘庆霖
2021-12-26 8:59 ` Jisheng Zhang
2022-01-04 12:44 ` Alexandre Ghiti
2021-12-29 3:42 ` Guo Ren
2022-01-04 12:42 ` Alexandre Ghiti
2022-04-26 5:57 ` Nick Kossifidis
2021-12-06 10:46 ` [PATCH v3 08/13] riscv: Use pgtable_l4_enabled to output mmu_type in cpuinfo Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 09/13] riscv: Explicit comment about user virtual address space size Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 10/13] riscv: Improve virtual kernel memory layout dump Alexandre Ghiti
2021-12-09 4:18 ` 潘庆霖
2021-12-09 9:09 ` Alexandre ghiti
2021-12-06 10:46 ` [PATCH v3 11/13] Documentation: riscv: Add sv48 description to VM layout Alexandre Ghiti
2021-12-06 10:46 ` [PATCH v3 12/13] riscv: Initialize thread pointer before calling C functions Alexandre Ghiti
2021-12-20 9:11 ` Guo Ren
2021-12-20 9:17 ` Ard Biesheuvel
2021-12-20 13:40 ` Guo Ren
2022-01-10 8:03 ` Alexandre ghiti
2021-12-06 10:46 ` [PATCH v3 13/13] riscv: Allow user to downgrade to sv39 when hw supports sv48 if !KASAN Alexandre Ghiti
2021-12-06 11:08 ` [PATCH v3 00/13] Introduce sv48 support without relocatable kernel Alexandre ghiti
2022-01-20 4:18 ` Palmer Dabbelt
2022-01-20 7:30 ` Alexandre Ghiti
2022-01-20 10:05 ` Alexandre Ghiti
2022-02-18 10:45 ` Alexandre Ghiti
2022-04-01 12:56 ` Alexandre Ghiti
2022-04-23 1:50 ` Palmer Dabbelt
2022-06-02 3:43 ` Palmer Dabbelt
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