From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4B983C433FE for ; Fri, 17 Dec 2021 12:50:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Yb/mJvyLPyumP40r4F/0bVAxvAPCPnHjIgesnogv/SQ=; b=kUmPab33EWh3yj vehFiOWzoUxyH9pROjnm4SqwerrMQFxxP95pW++WEOIdvgp47HSzwuz9phjOBgIjq/DlFIF8tl8NB odbKOhqdnrne3jopIhi5xjLCiXbD8EC6CVd87GqNccgtzXukJzGPa/m+Qhp89yj/YkQDCvjr6P5ha 2Jm6BanI4Nj+5b29QVwFmyeQyIVkEPDqMC3XcbX5sGM3Ye8k/9+ALDUU2sTkNQ/ttHKeUs6s56byv jLV2Vpf944zKOZ+LVbQq/y1bI0oi3xlRFpxxQvZ1+OYal11IZ6Y69eyoTIAA6EkBvSIiOLiBfCn45 UmbgeqQ6k6aL1BuceelQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1myCge-00AEXT-PQ; Fri, 17 Dec 2021 12:50:12 +0000 Received: from laurent.telenet-ops.be ([2a02:1800:110:4::f00:19]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1myCgI-00AEEs-Aa for linux-riscv@lists.infradead.org; Fri, 17 Dec 2021 12:49:53 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed20:d13f:527c:5504:a743]) by laurent.telenet-ops.be with bizsmtp id XQpm2600B250X3001QpmGJ; Fri, 17 Dec 2021 13:49:47 +0100 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtps (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.93) (envelope-from ) id 1myCgD-005YxV-Hl; Fri, 17 Dec 2021 13:49:45 +0100 Received: from geert by rox.of.borg with local (Exim 4.93) (envelope-from ) id 1myCgC-00ASrr-P1; Fri, 17 Dec 2021 13:49:44 +0100 From: Geert Uytterhoeven To: Paul Walmsley , Palmer Dabbelt , Albert Ou Cc: Rob Herring , Damien Le Moal , Lewis Hanly , Krzysztof Kozlowski , Conor Dooley , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 11/11] riscv: dts: sifive: fu540-c000: Fix PLIC node Date: Fri, 17 Dec 2021 13:49:32 +0100 Message-Id: <41497b8f509254e9ad21f5f7a34b7159ece5ba82.1639744905.git.geert@linux-m68k.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211217_044950_682133_F28DA29C X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Fix the device node for the Platform-Level Interrupt Controller (PLIC): - Add missing "#address-cells" property, - Sort properties according to DT bindings. Signed-off-by: Geert Uytterhoeven --- v3: - No changes, v2: - New. --- arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi index b1250c16816f5c9d..3eef52b1a59b5cb4 100644 --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi @@ -140,10 +140,10 @@ soc { compatible = "simple-bus"; ranges; plic0: interrupt-controller@c000000 { - #interrupt-cells = <1>; compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,ndev = <53>; + #address-cells = <0>; + #interrupt-cells = <1>; interrupt-controller; interrupts-extended = <&cpu0_intc 0xffffffff>, @@ -151,6 +151,7 @@ plic0: interrupt-controller@c000000 { <&cpu2_intc 0xffffffff>, <&cpu2_intc 9>, <&cpu3_intc 0xffffffff>, <&cpu3_intc 9>, <&cpu4_intc 0xffffffff>, <&cpu4_intc 9>; + riscv,ndev = <53>; }; prci: clock-controller@10000000 { compatible = "sifive,fu540-c000-prci"; -- 2.25.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv