From: Chen Wang <unicorn_wang@outlook.com>
To: soc@kernel.org
Cc: "conor@kernel.org >> Conor Dooley" <conor@kernel.org>,
Arnd Bergmann <arnd@arndb.de>,
linux-riscv <linux-riscv@lists.infradead.org>,
Inochi Amaoto <inochiama@outlook.com>,
Xiaoguang Xing <xiaoguang.xing@sophgo.com>,
haijiao.liu@sophgo.com, Chao Wei <chao.wei@sophgo.com>,
Liu Gui <kenneth.liu@sophgo.com>,
unicorn_wang@outlook.com, Jisheng Zhang <jszhang@kernel.org>
Subject: [GIT PULL] RISC-V Sophgo Devicetrees for v6.10
Date: Wed, 1 May 2024 09:31:27 +0800 [thread overview]
Message-ID: <MA0P287MB2822CA2DE757787D6EA3B1F8FE192@MA0P287MB2822.INDP287.PROD.OUTLOOK.COM> (raw)
Hey Arnd,
Please pull dt changes for RISC-V/Sophgo.
Thanks,
Chen.
The following changes since commit 4cece764965020c22cff7665b18a012006359095:
Linux 6.9-rc1 (2024-03-24 14:10:05 -0700)
are available in the Git repository at:
https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.10
for you to fetch changes up to 1eba0b61be72506549e79dd11a132b5d73aed094:
riscv: dts: sophgo: add reserved memory node for CV1800B (2024-04-23
16:38:09 +0800)
----------------------------------------------------------------
RISC-V Devicetrees for v6.10
Sophgo:
Added sdhci support for cv18xx/duo.
Added clock support for cv18xx.
Added clock for uart/sdhci.
Added spi support for cv18xx.
Added i2c support for cv18xx.
Added reserved memory node for cv1800b/duo.
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
----------------------------------------------------------------
Inochi Amaoto (6):
riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC
riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC
riscv: dts: sophgo: cv18xx: Add spi devices
riscv: dts: sophgo: cv18xx: Add i2c devices
riscv: dts: sophgo: use real clock for sdhci
riscv: dts: sophgo: add reserved memory node for CV1800B
Jisheng Zhang (1):
riscv: dts: sophgo: add sdcard support for milkv duo
arch/riscv/boot/dts/sophgo/cv1800b-milkv-duo.dts | 20 +++++++++++++---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 9 +++++++
arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 ++++
arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 132
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
4 files changed, 157 insertions(+), 8 deletions(-)
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reply other threads:[~2024-05-01 1:32 UTC|newest]
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