From: Palmer Dabbelt <palmer@dabbelt.com>
To: jszhang@kernel.org
Cc: Paul Walmsley <paul.walmsley@sifive.com>,
aou@eecs.berkeley.edu, alex@ghiti.fr,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] riscv: mm: fix wrong phys_ram_base value for RV64
Date: Tue, 11 Jan 2022 09:28:05 -0800 (PST) [thread overview]
Message-ID: <mhng-662897d8-3b0a-4580-a607-f853c01263b5@palmer-ri-x1c9> (raw)
In-Reply-To: <20211202153641.1961-1-jszhang@kernel.org>
On Thu, 02 Dec 2021 07:36:41 PST (-0800), jszhang@kernel.org wrote:
> Currently, if 64BIT and !XIP_KERNEL, the phys_ram_base is always 0,
> no matter the real start of dram reported by memblock is. The original
> patch[1] is correct, I believe it's not corrected merged due to lots
> of #ifdef in arch/riscv/mm/init.c, I plan to send a clean up series
> soon.
>
> [1] http://lists.infradead.org/pipermail/linux-riscv/2021-July/007650.html
>
> Fixes: 6d7f91d914bc ("riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion")
> Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Thanks, this is on for-next.
> ---
> arch/riscv/mm/init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
> index 24b2b8044602..3c0649dba4ff 100644
> --- a/arch/riscv/mm/init.c
> +++ b/arch/riscv/mm/init.c
> @@ -187,10 +187,10 @@ static void __init setup_bootmem(void)
>
>
> phys_ram_end = memblock_end_of_DRAM();
> -#ifndef CONFIG_64BIT
> #ifndef CONFIG_XIP_KERNEL
> phys_ram_base = memblock_start_of_DRAM();
> #endif
> +#ifndef CONFIG_64BIT
> /*
> * memblock allocator is not aware of the fact that last 4K bytes of
> * the addressable memory can not be mapped because of IS_ERR_VALUE
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
prev parent reply other threads:[~2022-01-11 17:28 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-02 15:36 [PATCH] riscv: mm: fix wrong phys_ram_base value for RV64 Jisheng Zhang
2021-12-02 15:52 ` Alexandre ghiti
2021-12-26 8:10 ` Jisheng Zhang
2022-01-11 17:28 ` Palmer Dabbelt [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=mhng-662897d8-3b0a-4580-a607-f853c01263b5@palmer-ri-x1c9 \
--to=palmer@dabbelt.com \
--cc=alex@ghiti.fr \
--cc=aou@eecs.berkeley.edu \
--cc=jszhang@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=paul.walmsley@sifive.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).