From: "Paul E. McKenney" <paulmck@kernel.org>
To: Al Viro <viro@zeniv.linux.org.uk>
Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>,
linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org,
elver@google.com, akpm@linux-foundation.org, tglx@linutronix.de,
peterz@infradead.org, dianders@chromium.org, pmladek@suse.com,
arnd@arndb.de, torvalds@linux-foundation.org,
kernel-team@meta.com, Andi Shyti <andi.shyti@linux.intel.com>,
Palmer Dabbelt <palmer@rivosinc.com>,
Masami Hiramatsu <mhiramat@kernel.org>,
linux-sh@vger.kernel.org
Subject: Re: [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg
Date: Thu, 2 May 2024 14:18:48 -0700 [thread overview]
Message-ID: <0a429959-935d-4800-8d0c-4e010951996d@paulmck-laptop> (raw)
In-Reply-To: <20240502205345.GK2118490@ZenIV>
On Thu, May 02, 2024 at 09:53:45PM +0100, Al Viro wrote:
> On Thu, May 02, 2024 at 06:33:49AM -0700, Paul E. McKenney wrote:
>
> > Understood, and this sort of compatibility consideration is why this
> > version of this patchset does not emulate two-byte (16-bit) cmpxchg()
> > operations. The original (RFC) series did emulate these, which does
> > not work on a few architectures that do not provide 16-bit load/store
> > instructions, hence no 16-bit support in this series.
> >
> > So this one-byte-only series affects only Alpha systems lacking
> > single-byte load/store instructions. If I understand correctly, Alpha
> > 21164A (EV56) and later *do* have single-byte load/store instructions,
> > and thus are still just fine. In fact, it looks like EV56 also has
> > two-byte load/store instructions, and so would have been OK with
> > the original one-/two-byte RFC series.
>
> Wait a sec. On Alpha we already implement 16bit and 8bit xchg and cmpxchg.
> See arch/alpha/include/asm/xchg.h:
> static inline unsigned long
> ____cmpxchg(_u16, volatile short *m, unsigned short old, unsigned short new)
> {
> unsigned long prev, tmp, cmp, addr64;
>
> __asm__ __volatile__(
> " andnot %5,7,%4\n"
> " inswl %1,%5,%1\n"
> "1: ldq_l %2,0(%4)\n"
> " extwl %2,%5,%0\n"
> " cmpeq %0,%6,%3\n"
> " beq %3,2f\n"
> " mskwl %2,%5,%2\n"
> " or %1,%2,%2\n"
> " stq_c %2,0(%4)\n"
> " beq %2,3f\n"
> "2:\n"
> ".subsection 2\n"
> "3: br 1b\n"
> ".previous"
> : "=&r" (prev), "=&r" (new), "=&r" (tmp), "=&r" (cmp), "=&r" (addr64)
> : "r" ((long)m), "Ir" (old), "1" (new) : "memory");
>
> return prev;
> }
>
> Load-locked and store-conditional are done on 64bit value, with
> 16bit operations done in registers. This is what 16bit store
> (assignment to unsigned short *) turns into with
> stw $17,0($16) // *(u16*)r16 = r17
> and without -mbwx
> insql $17,$16,$17 // r17 = r17 << (8 * (r16 & 7))
> ldq_u $1,0($16) // r1 = *(u64 *)(r16 & ~7)
> mskwl $1,$16,$1 // r1 &= ~(0xffff << (8 * (r16 & 7))
> bis $17,$1,$17 // r17 |= r1
> stq_u $17,0($16) // *(u64 *)(r16 & ~7) = r17
>
> What's more, load-locked/store-conditional doesn't have 16bit and 8bit
> variants on any Alphas - it's always 32bit (ldl_l) or 64bit (ldq_l).
>
> What BWX adds is load/store byte/word, load/store byte/word unaligned
> and sign-extend byte/word. IOW, it's absolutely irrelevant for
> cmpxchg (or xchg) purposes.
If you are only ever doing atomic read-modify-write operations on the
byte in question, then agreed, you don't care about byte loads and stores.
But there are use cases that do mix smp_store_release() with cmpxchg(),
and those use cases won't work unless at least byte store is implemented.
Or I suppose that we could use cmpxchg() instead of smp_store_release(),
but that is wasteful for architectures that do support byte stores.
So EV56 adds the byte loads and stores needed for those use cases.
Or am I missing your point?
Thanx, Paul
next prev parent reply other threads:[~2024-05-02 21:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <b67e79d4-06cb-4a45-a906-b9e0fbae22c5@paulmck-laptop>
2024-05-01 23:01 ` [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg Paul E. McKenney
2024-05-02 4:52 ` John Paul Adrian Glaubitz
2024-05-02 5:06 ` Paul E. McKenney
2024-05-02 5:11 ` John Paul Adrian Glaubitz
2024-05-02 13:33 ` Paul E. McKenney
2024-05-02 20:53 ` Al Viro
2024-05-02 21:01 ` alpha cmpxchg.h (was Re: [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg) Al Viro
2024-05-02 22:16 ` Linus Torvalds
2024-05-02 21:18 ` Paul E. McKenney [this message]
2024-05-02 22:07 ` [PATCH v2 cmpxchg 12/13] sh: Emulate one-byte cmpxchg Al Viro
2024-05-02 23:12 ` Paul E. McKenney
2024-05-02 23:24 ` Al Viro
2024-05-02 23:45 ` Paul E. McKenney
2024-05-02 23:32 ` Linus Torvalds
2024-05-03 0:16 ` Paul E. McKenney
2024-05-02 21:50 ` Arnd Bergmann
2024-05-02 5:42 ` D. Jeff Dionne
2024-05-02 11:30 ` Arnd Bergmann
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0a429959-935d-4800-8d0c-4e010951996d@paulmck-laptop \
--to=paulmck@kernel.org \
--cc=akpm@linux-foundation.org \
--cc=andi.shyti@linux.intel.com \
--cc=arnd@arndb.de \
--cc=dianders@chromium.org \
--cc=elver@google.com \
--cc=glaubitz@physik.fu-berlin.de \
--cc=kernel-team@meta.com \
--cc=linux-arch@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-sh@vger.kernel.org \
--cc=mhiramat@kernel.org \
--cc=palmer@rivosinc.com \
--cc=peterz@infradead.org \
--cc=pmladek@suse.com \
--cc=tglx@linutronix.de \
--cc=torvalds@linux-foundation.org \
--cc=viro@zeniv.linux.org.uk \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).