From: Thierry Reding <thierry.reding@gmail.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>
Cc: x86@kernel.org, linux-arm-kernel@lists.infradead.org,
linux-riscv@lists.infradead.org, linux-mips@vger.kernel.org,
loongarch@lists.linux.dev, linuxppc-dev@lists.ozlabs.org,
linux-sh@vger.kernel.org, linux-pci@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v3 2/7] MIPS: PCI: Use contextual data instead of global variable
Date: Wed, 29 Oct 2025 17:33:31 +0100 [thread overview]
Message-ID: <20251029163336.2785270-3-thierry.reding@gmail.com> (raw)
In-Reply-To: <20251029163336.2785270-1-thierry.reding@gmail.com>
From: Thierry Reding <treding@nvidia.com>
Pass the driver-specific data via the syscore struct and use it in the
syscore ops.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v3:
- adjust for API changes and update commit message
Changes in v2:
- remove unused global variable
arch/mips/pci/pci-alchemy.c | 24 ++++++------------------
1 file changed, 6 insertions(+), 18 deletions(-)
diff --git a/arch/mips/pci/pci-alchemy.c b/arch/mips/pci/pci-alchemy.c
index 6bfee0f71803..f73bf60bd069 100644
--- a/arch/mips/pci/pci-alchemy.c
+++ b/arch/mips/pci/pci-alchemy.c
@@ -33,6 +33,7 @@
struct alchemy_pci_context {
struct pci_controller alchemy_pci_ctrl; /* leave as first member! */
+ struct syscore syscore;
void __iomem *regs; /* ctrl base */
/* tools for wired entry for config space access */
unsigned long last_elo0;
@@ -46,12 +47,6 @@ struct alchemy_pci_context {
int (*board_pci_idsel)(unsigned int devsel, int assert);
};
-/* for syscore_ops. There's only one PCI controller on Alchemy chips, so this
- * should suffice for now.
- */
-static struct alchemy_pci_context *__alchemy_pci_ctx;
-
-
/* IO/MEM resources for PCI. Keep the memres in sync with fixup_bigphys_addr
* in arch/mips/alchemy/common/setup.c
*/
@@ -306,9 +301,7 @@ static int alchemy_pci_def_idsel(unsigned int devsel, int assert)
/* save PCI controller register contents. */
static int alchemy_pci_suspend(void *data)
{
- struct alchemy_pci_context *ctx = __alchemy_pci_ctx;
- if (!ctx)
- return 0;
+ struct alchemy_pci_context *ctx = data;
ctx->pm[0] = __raw_readl(ctx->regs + PCI_REG_CMEM);
ctx->pm[1] = __raw_readl(ctx->regs + PCI_REG_CONFIG) & 0x0009ffff;
@@ -328,9 +321,7 @@ static int alchemy_pci_suspend(void *data)
static void alchemy_pci_resume(void *data)
{
- struct alchemy_pci_context *ctx = __alchemy_pci_ctx;
- if (!ctx)
- return;
+ struct alchemy_pci_context *ctx = data;
__raw_writel(ctx->pm[0], ctx->regs + PCI_REG_CMEM);
__raw_writel(ctx->pm[2], ctx->regs + PCI_REG_B2BMASK_CCH);
@@ -359,10 +350,6 @@ static const struct syscore_ops alchemy_pci_syscore_ops = {
.resume = alchemy_pci_resume,
};
-static struct syscore alchemy_pci_syscore = {
- .ops = &alchemy_pci_syscore_ops,
-};
-
static int alchemy_pci_probe(struct platform_device *pdev)
{
struct alchemy_pci_platdata *pd = pdev->dev.platform_data;
@@ -480,9 +467,10 @@ static int alchemy_pci_probe(struct platform_device *pdev)
__raw_writel(val, ctx->regs + PCI_REG_CONFIG);
wmb();
- __alchemy_pci_ctx = ctx;
platform_set_drvdata(pdev, ctx);
- register_syscore(&alchemy_pci_syscore);
+ ctx->syscore.ops = &alchemy_pci_syscore_ops;
+ ctx->syscore.data = ctx;
+ register_syscore(&ctx->syscore);
register_pci_controller(&ctx->alchemy_pci_ctrl);
dev_info(&pdev->dev, "PCI controller at %ld MHz\n",
--
2.51.0
next prev parent reply other threads:[~2025-10-29 16:33 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 16:33 [PATCH v3 0/7] syscore: Pass context data to callbacks Thierry Reding
2025-10-29 16:33 ` [PATCH v3 1/7] " Thierry Reding
2025-11-03 16:18 ` Rafael J. Wysocki
2025-11-05 16:52 ` Thierry Reding
2025-11-13 18:32 ` Thierry Reding
2025-11-13 19:18 ` Rafael J. Wysocki
2025-10-29 16:33 ` Thierry Reding [this message]
2025-10-29 17:46 ` [PATCH v3 2/7] MIPS: PCI: Use contextual data instead of global variable Bjorn Helgaas
2025-10-30 12:16 ` Thierry Reding
2025-10-30 15:31 ` Bjorn Helgaas
2025-10-30 20:10 ` Maciej W. Rozycki
2025-10-29 16:33 ` [PATCH v3 3/7] bus: mvebu-mbus: " Thierry Reding
2025-10-29 16:33 ` [PATCH v3 4/7] clk: ingenic: tcu: " Thierry Reding
2025-10-29 17:56 ` Bjorn Helgaas
2025-10-30 12:28 ` Thierry Reding
2025-10-29 16:33 ` [PATCH v3 5/7] clk: mvebu: " Thierry Reding
2025-10-29 16:33 ` [PATCH v3 6/7] irqchip/irq-imx-gpcv2: " Thierry Reding
2025-10-29 16:33 ` [PATCH v3 7/7] soc/tegra: pmc: " Thierry Reding
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