From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: Conor Dooley <conor@kernel.org>, linux-spi@vger.kernel.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
stable@vger.kernel.org,
Daire McNamara <daire.mcnamara@microchip.com>,
Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>,
Mark Brown <broonie@kernel.org>,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v1] spi: microchip-core-qspi: fix setting spi bus clock rate
Date: Wed, 8 May 2024 17:39:03 +0100 [thread overview]
Message-ID: <f7528434-6780-48f6-87a4-3d56d87f44fe@linaro.org> (raw)
In-Reply-To: <20240508-fox-unpiloted-b97e1535627b@spud>
On 5/8/24 16:46, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Before ORing the new clock rate with the control register value read
> from the hardware, the existing clock rate needs to be masked off as
> otherwise the existing value will interfere with the new one.
>
> CC: stable@vger.kernel.org
> Fixes: 8596124c4c1b ("spi: microchip-core-qspi: Add support for microchip fpga qspi controllers")
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
> ---
> CC: Conor Dooley <conor.dooley@microchip.com>
> CC: Daire McNamara <daire.mcnamara@microchip.com>
> CC: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
> CC: Mark Brown <broonie@kernel.org>
> CC: linux-spi@vger.kernel.org
> CC: linux-kernel@vger.kernel.org
> ---
> drivers/spi/spi-microchip-core-qspi.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/spi/spi-microchip-core-qspi.c b/drivers/spi/spi-microchip-core-qspi.c
> index 03d125a71fd9..09f16471c537 100644
> --- a/drivers/spi/spi-microchip-core-qspi.c
> +++ b/drivers/spi/spi-microchip-core-qspi.c
> @@ -283,6 +283,7 @@ static int mchp_coreqspi_setup_clock(struct mchp_coreqspi *qspi, struct spi_devi
> }
>
> control = readl_relaxed(qspi->regs + REG_CONTROL);
> + control &= ~CONTROL_CLKRATE_MASK;
> control |= baud_rate_val << CONTROL_CLKRATE_SHIFT;
> writel_relaxed(control, qspi->regs + REG_CONTROL);
> control = readl_relaxed(qspi->regs + REG_CONTROL);
next prev parent reply other threads:[~2024-05-08 16:39 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-08 15:46 [PATCH v1] spi: microchip-core-qspi: fix setting spi bus clock rate Conor Dooley
2024-05-08 16:39 ` Tudor Ambarus [this message]
2024-05-09 6:37 ` Mark Brown
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