From: Peter Griffin <peter.griffin@linaro.org>
To: robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org,
mturquette@baylibre.com, conor+dt@kernel.org, sboyd@kernel.org,
tomasz.figa@gmail.com, s.nawrocki@samsung.com,
linus.walleij@linaro.org, wim@linux-watchdog.org,
linux@roeck-us.net, catalin.marinas@arm.com, will@kernel.org,
arnd@arndb.de, olof@lixom.net, gregkh@linuxfoundation.org,
jirislaby@kernel.org, cw00.choi@samsung.com,
alim.akhtar@samsung.com
Cc: peter.griffin@linaro.org, tudor.ambarus@linaro.org,
andre.draszik@linaro.org, semen.protsenko@linaro.org,
saravanak@google.com, willmcvicker@google.com, soc@kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-samsung-soc@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-watchdog@vger.kernel.org,
kernel-team@android.com, linux-serial@vger.kernel.org
Subject: [PATCH v5 15/20] watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit
Date: Fri, 1 Dec 2023 16:09:20 +0000 [thread overview]
Message-ID: <20231201160925.3136868-16-peter.griffin@linaro.org> (raw)
In-Reply-To: <20231201160925.3136868-1-peter.griffin@linaro.org>
The WDT uses the CPU core signal DBGACK to determine whether the SoC
is running in debug mode or not. If the DBGACK signal is asserted and
DBGACK_MASK bit is enabled, then WDT output and interrupt is masked
(disabled).
Presence of the DBGACK_MASK bit is determined by adding a new
QUIRK_HAS_DBGACK_BIT quirk.
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
---
drivers/watchdog/s3c2410_wdt.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 0b4bd883ff28..39f3489e41d6 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -34,9 +34,10 @@
#define S3C2410_WTCNT_MAXCNT 0xffff
-#define S3C2410_WTCON_RSTEN (1 << 0)
-#define S3C2410_WTCON_INTEN (1 << 2)
-#define S3C2410_WTCON_ENABLE (1 << 5)
+#define S3C2410_WTCON_RSTEN (1 << 0)
+#define S3C2410_WTCON_INTEN (1 << 2)
+#define S3C2410_WTCON_ENABLE (1 << 5)
+#define S3C2410_WTCON_DBGACK_MASK (1 << 16)
#define S3C2410_WTCON_DIV16 (0 << 3)
#define S3C2410_WTCON_DIV32 (1 << 3)
@@ -100,12 +101,17 @@
* %QUIRK_HAS_PMU_CNT_EN: PMU block has some register (e.g. CLUSTERx_NONCPU_OUT)
* with "watchdog counter enable" bit. That bit should be set to make watchdog
* counter running.
+ *
+ * %QUIRK_HAS_DBGACK_BIT: WTCON register has DBGACK_MASK bit. Setting the
+ * DBGACK_MASK bit disables the watchdog outputs when the SoC is in debug mode.
+ * Debug mode is determined by the DBGACK CPU signal.
*/
#define QUIRK_HAS_WTCLRINT_REG (1 << 0)
#define QUIRK_HAS_PMU_MASK_RESET (1 << 1)
#define QUIRK_HAS_PMU_RST_STAT (1 << 2)
#define QUIRK_HAS_PMU_AUTO_DISABLE (1 << 3)
#define QUIRK_HAS_PMU_CNT_EN (1 << 4)
+#define QUIRK_HAS_DBGACK_BIT (1 << 5)
/* These quirks require that we have a PMU register map */
#define QUIRKS_HAVE_PMUREG \
@@ -375,6 +381,19 @@ static int s3c2410wdt_enable(struct s3c2410_wdt *wdt, bool en)
return 0;
}
+static void s3c2410wdt_mask_dbgack(struct s3c2410_wdt *wdt)
+{
+ unsigned long wtcon;
+
+ if (!(wdt->drv_data->quirks & QUIRK_HAS_DBGACK_BIT))
+ return;
+
+ /* disable watchdog outputs if CPU is in debug mode */
+ wtcon = readl(wdt->reg_base + S3C2410_WTCON);
+ wtcon |= S3C2410_WTCON_DBGACK_MASK;
+ writel(wtcon, wdt->reg_base + S3C2410_WTCON);
+}
+
static int s3c2410wdt_keepalive(struct watchdog_device *wdd)
{
struct s3c2410_wdt *wdt = watchdog_get_drvdata(wdd);
@@ -700,6 +719,8 @@ static int s3c2410wdt_probe(struct platform_device *pdev)
wdt->wdt_device.bootstatus = s3c2410wdt_get_bootstatus(wdt);
wdt->wdt_device.parent = dev;
+ s3c2410wdt_mask_dbgack(wdt);
+
/*
* If "tmr_atboot" param is non-zero, start the watchdog right now. Also
* set WDOG_HW_RUNNING bit, so that watchdog core can kick the watchdog.
--
2.43.0.rc2.451.g8631bc7472-goog
next prev parent reply other threads:[~2023-12-01 16:11 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-01 16:09 [PATCH v5 00/20] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board Peter Griffin
2023-12-01 16:09 ` [PATCH v5 01/20] dt-bindings: soc: samsung: exynos-pmu: Add gs101 compatible Peter Griffin
2023-12-01 16:09 ` [PATCH v5 02/20] dt-bindings: clock: Add Google gs101 clock management unit bindings Peter Griffin
2023-12-01 20:11 ` Sam Protsenko
2023-12-03 20:59 ` Peter Griffin
2023-12-06 12:30 ` André Draszik
2023-12-09 0:10 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 03/20] dt-bindings: soc: google: exynos-sysreg: add dedicated SYSREG compatibles to GS101 Peter Griffin
2023-12-01 16:09 ` [PATCH v5 04/20] dt-bindings: watchdog: Document Google gs101 watchdog bindings Peter Griffin
2023-12-01 20:13 ` Sam Protsenko
2023-12-01 16:09 ` [PATCH v5 05/20] dt-bindings: arm: google: Add bindings for Google ARM platforms Peter Griffin
2023-12-01 20:22 ` Sam Protsenko
2023-12-03 21:13 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 06/20] dt-bindings: pinctrl: samsung: add google,gs101-pinctrl compatible Peter Griffin
2023-12-01 16:09 ` [PATCH v5 07/20] dt-bindings: pinctrl: samsung: add gs101-wakeup-eint compatible Peter Griffin
2023-12-01 20:25 ` Sam Protsenko
2023-12-03 15:11 ` Krzysztof Kozlowski
2023-12-03 21:21 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 08/20] dt-bindings: serial: samsung: Add google-gs101-uart compatible Peter Griffin
2023-12-01 16:09 ` [PATCH v5 09/20] dt-bindings: serial: samsung: Make samsung,uart-fifosize required property Peter Griffin
2023-12-01 16:39 ` Arnd Bergmann
2023-12-03 21:31 ` Peter Griffin
2023-12-11 18:26 ` Rob Herring
2023-12-03 15:10 ` Krzysztof Kozlowski
2023-12-03 21:39 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 10/20] dt-bindings: soc: samsung: usi: add google,gs101-usi compatible Peter Griffin
2023-12-01 20:39 ` Sam Protsenko
2023-12-03 15:09 ` Krzysztof Kozlowski
2023-12-03 21:47 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 11/20] clk: samsung: clk-pll: Add support for pll_{0516,0517,518} Peter Griffin
2023-12-01 16:09 ` [PATCH v5 12/20] clk: samsung: clk-gs101: Add cmu_top, cmu_misc and cmu_apm support Peter Griffin
2023-12-01 22:40 ` Sam Protsenko
2023-12-05 8:09 ` André Draszik
2023-12-08 11:35 ` Peter Griffin
2023-12-04 17:51 ` André Draszik
2023-12-08 14:27 ` Peter Griffin
2023-12-05 7:52 ` André Draszik
2023-12-08 21:14 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 13/20] pinctrl: samsung: Add filter selection support for alive banks Peter Griffin
2023-12-01 23:55 ` William McVicker
2023-12-05 19:51 ` Peter Griffin
2023-12-02 0:22 ` Sam Protsenko
2023-12-05 11:34 ` Peter Griffin
2023-12-05 19:10 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 14/20] pinctrl: samsung: Add gs101 SoC pinctrl configuration Peter Griffin
2023-12-01 23:57 ` William McVicker
2023-12-02 0:40 ` Sam Protsenko
2023-12-02 1:36 ` Alim Akhtar
2023-12-02 1:58 ` Sam Protsenko
2023-12-06 11:38 ` Krzysztof Kozlowski
2023-12-06 12:47 ` Peter Griffin
2023-12-05 21:24 ` Peter Griffin
2023-12-01 16:09 ` Peter Griffin [this message]
2023-12-01 23:59 ` [PATCH v5 15/20] watchdog: s3c2410_wdt: Add support for WTCON register DBGACK_MASK bit William McVicker
2023-12-02 0:53 ` Sam Protsenko
2023-12-05 22:03 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 16/20] watchdog: s3c2410_wdt: Add support for Google gs101 SoC Peter Griffin
2023-12-01 23:59 ` William McVicker
2023-12-02 1:02 ` Sam Protsenko
2023-12-05 22:19 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 17/20] tty: serial: samsung: Add gs101 compatible and common fifoszdt_serial_drv_data Peter Griffin
2023-12-02 0:01 ` William McVicker
2023-12-05 22:29 ` Peter Griffin
2023-12-02 1:09 ` Sam Protsenko
2023-12-05 22:27 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 18/20] arm64: dts: exynos: google: Add initial Google gs101 SoC support Peter Griffin
2023-12-02 0:03 ` William McVicker
2023-12-02 1:54 ` Sam Protsenko
2023-12-05 7:19 ` Krzysztof Kozlowski
2023-12-09 1:00 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 19/20] arm64: dts: exynos: google: Add initial Oriole/pixel 6 board support Peter Griffin
2023-12-02 0:03 ` William McVicker
2023-12-02 2:28 ` Sam Protsenko
2023-12-09 22:04 ` Peter Griffin
2023-12-01 16:09 ` [PATCH v5 20/20] MAINTAINERS: add entry for Google Tensor SoC Peter Griffin
2023-12-01 22:40 ` [PATCH v5 00/20] Add minimal Tensor/GS101 SoC support and Oriole/Pixel6 board William McVicker
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