From: Chia Hsing Yin <peteryin.openbmc@gmail.com>
To: Guenter Roeck <linux@roeck-us.net>
Cc: patrick@stwcx.xyz, Wim Van Sebroeck <wim@linux-watchdog.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Joel Stanley <joel@jms.id.au>,
Andrew Jeffery <andrew@codeconstruct.com.au>,
linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus
Date: Thu, 28 Mar 2024 00:07:37 +0800 [thread overview]
Message-ID: <CAPSyxFQ8Dpks6c17XpF-fw9ppgoKfYfvYADvqVw2PYHNFptWTQ@mail.gmail.com> (raw)
In-Reply-To: <f0b03c0b-eb54-420e-a4f7-8286e20b9df6@roeck-us.net>
On Wed, Mar 27, 2024 at 11:47 PM Guenter Roeck <linux@roeck-us.net> wrote:
>
> On 3/27/24 01:53, Peter Yin wrote:
> > Add WDIOF_EXTERN1 and WDIOF_CARDRESET bootstatus in ast2600
> >
> > Regarding the AST2600 specification, the WDTn Timeout Status Register
> > (WDT10) has bit 1 reserved. Bit 1 of the status register indicates
> > on ast2500 if the boot was from the second boot source.
> > It does not indicate that the most recent reset was triggered by
> > the watchdog. The code should just be changed to set WDIOF_CARDRESET
> > if bit 0 of the status register is set.
> >
> > Include SCU register to veriy WDIOF_EXTERN1 in ast2600 SCU74 or
> > ast2500 SCU3C when bit1 is set.
> >
> > Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
> > ---
> > drivers/watchdog/aspeed_wdt.c | 60 +++++++++++++++++++++++++----------
> > 1 file changed, 44 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/watchdog/aspeed_wdt.c b/drivers/watchdog/aspeed_wdt.c
> > index b4773a6aaf8c..29e9afdee619 100644
> > --- a/drivers/watchdog/aspeed_wdt.c
> > +++ b/drivers/watchdog/aspeed_wdt.c
> > @@ -11,10 +11,12 @@
> > #include <linux/io.h>
> > #include <linux/kernel.h>
> > #include <linux/kstrtox.h>
> > +#include <linux/mfd/syscon.h>
> > #include <linux/module.h>
> > #include <linux/of.h>
> > #include <linux/of_irq.h>
> > #include <linux/platform_device.h>
> > +#include <linux/regmap.h>
> > #include <linux/watchdog.h>
> >
> > static bool nowayout = WATCHDOG_NOWAYOUT;
> > @@ -65,23 +67,32 @@ MODULE_DEVICE_TABLE(of, aspeed_wdt_of_table);
> > #define WDT_RELOAD_VALUE 0x04
> > #define WDT_RESTART 0x08
> > #define WDT_CTRL 0x0C
> > -#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> > -#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> > -#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> > -#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> > -#define WDT_CTRL_1MHZ_CLK BIT(4)
> > -#define WDT_CTRL_WDT_EXT BIT(3)
> > -#define WDT_CTRL_WDT_INTR BIT(2)
> > -#define WDT_CTRL_RESET_SYSTEM BIT(1)
> > -#define WDT_CTRL_ENABLE BIT(0)
> > +#define WDT_CTRL_BOOT_SECONDARY BIT(7)
> > +#define WDT_CTRL_RESET_MODE_SOC (0x00 << 5)
> > +#define WDT_CTRL_RESET_MODE_FULL_CHIP (0x01 << 5)
> > +#define WDT_CTRL_RESET_MODE_ARM_CPU (0x10 << 5)
> > +#define WDT_CTRL_1MHZ_CLK BIT(4)
> > +#define WDT_CTRL_WDT_EXT BIT(3)
> > +#define WDT_CTRL_WDT_INTR BIT(2)
> > +#define WDT_CTRL_RESET_SYSTEM BIT(1)
> > +#define WDT_CTRL_ENABLE BIT(0)
> > #define WDT_TIMEOUT_STATUS 0x10
> > -#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> > -#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> > +#define WDT_TIMEOUT_STATUS_IRQ BIT(2)
> > +#define WDT_TIMEOUT_STATUS_BOOT_SECONDARY BIT(1)
> > +#define WDT_TIMEOUT_STATUS_EVENT BIT(0)
> > #define WDT_CLEAR_TIMEOUT_STATUS 0x14
> > -#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> > +#define WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION BIT(0)
> > #define WDT_RESET_MASK1 0x1c
> > #define WDT_RESET_MASK2 0x20
> >
>
> The above bit value defines were indented to show what is
> registers and what is register bit values. Why are you
> changing that other than for personal preference ?
>
> Guenter
>
Oh! I'm sorry, I didn't realize this was a rule. I thought it was just
an alignment issue. I will revert it in the next version. Thank you
for explaining.
prev parent reply other threads:[~2024-03-27 16:07 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-27 8:53 [PATCH v4 0/4] drivers: watchdog: ast2500 and ast2600 support bootstatus Peter Yin
2024-03-27 8:53 ` [PATCH v4 1/4] ARM: dts: aspeed: Add the AST2500 WDT with SCU register Peter Yin
2024-03-27 8:53 ` [PATCH v4 2/4] ARM: dts: aspeed: Add the AST2600 " Peter Yin
2024-03-27 8:53 ` [PATCH v4 3/4] dt-bindings: watchdog: aspeed-wdt: Add aspeed,scu Peter Yin
2024-03-27 8:53 ` [PATCH v4 4/4] drivers: watchdog: ast2500 and ast2600 support bootstatus Peter Yin
2024-03-27 15:47 ` Guenter Roeck
2024-03-27 16:07 ` Chia Hsing Yin [this message]
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