* [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips
@ 2023-10-12 2:14 Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen Ping-Ke Shih
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
WiFi 7 registers of RTS, MU-EDCA and beamforming are different from
existing chips, but we can still possibly reuse most of existing code.
The initial beamformee code when associated is largely different, so make
them as individual functions.
v2:
- correct commit message of patch 5/6
Ping-Ke Shih (1):
wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips
Zong-Zhe Yang (5):
wifi: rtw89: mac: update RTS threshold according to chip gen
wifi: rtw89: mac: generalize register of MU-EDCA switch according to
chip gen
wifi: rtw89: mac: set bfee_ctrl() according to chip gen
wifi: rtw89: mac: set bf_assoc capabilities according to chip gen
wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips
drivers/net/wireless/realtek/rtw89/mac.c | 57 ++++--
drivers/net/wireless/realtek/rtw89/mac.h | 22 ++-
drivers/net/wireless/realtek/rtw89/mac80211.c | 16 +-
drivers/net/wireless/realtek/rtw89/mac_be.c | 174 ++++++++++++++++++
drivers/net/wireless/realtek/rtw89/reg.h | 79 ++++++++
5 files changed, 322 insertions(+), 26 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
2023-10-14 6:44 ` Kalle Valo
2023-10-12 2:14 ` [PATCH v2 2/6] wifi: rtw89: mac: generalize register of MU-EDCA switch " Ping-Ke Shih
` (4 subsequent siblings)
5 siblings, 1 reply; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
From: Zong-Zhe Yang <kevin_yang@realtek.com>
When TX size or time of packet over RTS threshold set by this register,
hardware will use RTS protection automatically. Since WiFi 6 and 7 chips
have different register address for this, separate the address according
to chip gen.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac.c | 4 +++-
drivers/net/wireless/realtek/rtw89/mac.h | 1 +
drivers/net/wireless/realtek/rtw89/mac_be.c | 1 +
drivers/net/wireless/realtek/rtw89/reg.h | 6 ++++++
4 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index f1d14e84cda7..4587bd596c32 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -4840,6 +4840,7 @@ void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx)
#define MAC_AX_LEN_TH_MAX 255
#define MAC_AX_TIME_TH_DEF 88
#define MAC_AX_LEN_TH_DEF 4080
+ const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
struct ieee80211_hw *hw = rtwdev->hw;
u32 rts_threshold = hw->wiphy->rts_threshold;
u32 time_th, len_th;
@@ -4856,7 +4857,7 @@ void rtw89_mac_update_rts_threshold(struct rtw89_dev *rtwdev, u8 mac_idx)
time_th = min_t(u32, time_th >> MAC_AX_TIME_TH_SH, MAC_AX_TIME_TH_MAX);
len_th = min_t(u32, len_th >> MAC_AX_LEN_TH_SH, MAC_AX_LEN_TH_MAX);
- reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_AGG_LEN_HT_0, mac_idx);
+ reg = rtw89_mac_reg_by_idx(rtwdev, mac->agg_len_ht, mac_idx);
rtw89_write16_mask(rtwdev, reg, B_AX_RTS_TXTIME_TH_MASK, time_th);
rtw89_write16_mask(rtwdev, reg, B_AX_RTS_LEN_TH_MASK, len_th);
}
@@ -5751,6 +5752,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
.mem_base_addrs = rtw89_mac_mem_base_addrs_ax,
.rx_fltr = R_AX_RX_FLTR_OPT,
.port_base = &rtw89_port_base_ax,
+ .agg_len_ht = R_AX_AGG_LEN_HT_0,
.disable_cpu = rtw89_mac_disable_cpu_ax,
.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 617fd2aea776..b318027a977f 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -859,6 +859,7 @@ struct rtw89_mac_gen_def {
const u32 *mem_base_addrs;
u32 rx_fltr;
const struct rtw89_port_reg *port_base;
+ u32 agg_len_ht;
void (*disable_cpu)(struct rtw89_dev *rtwdev);
int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index 8af71d8a659a..6c277b6b25b8 100644
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -250,6 +250,7 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.mem_base_addrs = rtw89_mac_mem_base_addrs_be,
.rx_fltr = R_BE_RX_FLTR_OPT,
.port_base = &rtw89_port_base_be,
+ .agg_len_ht = R_BE_AGG_LEN_HT_0,
.disable_cpu = rtw89_mac_disable_cpu_be,
.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 95cdee52fdc8..8c148d6041d0 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -3894,6 +3894,12 @@
#define R_BE_PORT_HGQ_WINDOW_CFG 0x105A0
#define R_BE_PORT_HGQ_WINDOW_CFG_C1 0x145A0
+#define R_BE_AGG_LEN_HT_0 0x10814
+#define R_BE_AGG_LEN_HT_0_C1 0x14814
+#define B_BE_AMPDU_MAX_LEN_HT_MASK GENMASK(31, 16)
+#define B_BE_RTS_TXTIME_TH_MASK GENMASK(15, 8)
+#define B_BE_RTS_LEN_TH_MASK GENMASK(7, 0)
+
#define R_BE_MBSSID_DROP_0 0x1083C
#define R_BE_MBSSID_DROP_0_C1 0x1483C
#define B_BE_GI_LTF_FB_SEL BIT(30)
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 2/6] wifi: rtw89: mac: generalize register of MU-EDCA switch according to chip gen
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 3/6] wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips Ping-Ke Shih
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
From: Zong-Zhe Yang <kevin_yang@realtek.com>
When connected with 802.11ax AP, MU-EDCA parameters are given, so enable
this hardware function by registers according to chip generation.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac.c | 10 ++++++++--
drivers/net/wireless/realtek/rtw89/mac.h | 2 ++
drivers/net/wireless/realtek/rtw89/mac_be.c | 5 +++++
drivers/net/wireless/realtek/rtw89/reg.h | 7 +++++++
4 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index 4587bd596c32..d2621f31a78a 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -5593,8 +5593,9 @@ int rtw89_mac_get_tx_retry_limit(struct rtw89_dev *rtwdev,
int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev,
struct rtw89_vif *rtwvif, bool en)
{
+ const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
u8 mac_idx = rtwvif->mac_idx;
- u16 set = B_AX_MUEDCA_EN_0 | B_AX_SET_MUEDCATIMER_TF_0;
+ u16 set = mac->muedca_ctrl.mask;
u32 reg;
u32 ret;
@@ -5602,7 +5603,7 @@ int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev,
if (ret)
return ret;
- reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_MUEDCA_EN, mac_idx);
+ reg = rtw89_mac_reg_by_idx(rtwdev, mac->muedca_ctrl.addr, mac_idx);
if (en)
rtw89_write16_set(rtwdev, reg, set);
else
@@ -5754,6 +5755,11 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
.port_base = &rtw89_port_base_ax,
.agg_len_ht = R_AX_AGG_LEN_HT_0,
+ .muedca_ctrl = {
+ .addr = R_AX_MUEDCA_EN,
+ .mask = B_AX_MUEDCA_EN_0 | B_AX_SET_MUEDCATIMER_TF_0,
+ },
+
.disable_cpu = rtw89_mac_disable_cpu_ax,
.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
.fwdl_get_status = rtw89_fw_get_rdy_ax,
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index b318027a977f..982b357ec6f1 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -861,6 +861,8 @@ struct rtw89_mac_gen_def {
const struct rtw89_port_reg *port_base;
u32 agg_len_ht;
+ struct rtw89_reg_def muedca_ctrl;
+
void (*disable_cpu)(struct rtw89_dev *rtwdev);
int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
bool dlfw, bool include_bb);
diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index 6c277b6b25b8..514cf566eba1 100644
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -252,6 +252,11 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.port_base = &rtw89_port_base_be,
.agg_len_ht = R_BE_AGG_LEN_HT_0,
+ .muedca_ctrl = {
+ .addr = R_BE_MUEDCA_EN,
+ .mask = B_BE_MUEDCA_EN_0 | B_BE_SET_MUEDCATIMER_TF_0,
+ },
+
.disable_cpu = rtw89_mac_disable_cpu_be,
.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
.fwdl_get_status = fwdl_get_status_be,
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 8c148d6041d0..96d5959c299e 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -3780,6 +3780,13 @@
#define B_BE_P0_SYNC_PORT_SRC_SEL_MASK GENMASK(26, 24)
#define B_BE_P0_TSFTR_SYNC_OFFSET_MASK GENMASK(18, 0)
+#define R_BE_MUEDCA_EN 0x10370
+#define R_BE_MUEDCA_EN_C1 0x14370
+#define B_BE_MUEDCA_WMM_SEL BIT(8)
+#define B_BE_SET_MUEDCATIMER_TF_1 BIT(5)
+#define B_BE_SET_MUEDCATIMER_TF_0 BIT(4)
+#define B_BE_MUEDCA_EN_0 BIT(0)
+
#define R_BE_PORT_CFG_P0 0x10400
#define R_BE_PORT_CFG_P0_C1 0x14400
#define B_BE_BCN_ERLY_SORT_EN_P0 BIT(18)
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 3/6] wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 2/6] wifi: rtw89: mac: generalize register of MU-EDCA switch " Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 4/6] wifi: rtw89: mac: set bfee_ctrl() according to chip gen Ping-Ke Shih
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
According to chip generation, set MU-EDCA parameters from mac80211 when
connected.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac80211.c | 16 ++++++++++------
drivers/net/wireless/realtek/rtw89/reg.h | 5 +++++
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac80211.c b/drivers/net/wireless/realtek/rtw89/mac80211.c
index 16bbb7751197..31d1f7891675 100644
--- a/drivers/net/wireless/realtek/rtw89/mac80211.c
+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c
@@ -328,11 +328,14 @@ static void ____rtw89_conf_tx_edca(struct rtw89_dev *rtwdev,
rtw89_fw_h2c_set_edca(rtwdev, rtwvif, ac_to_fw_idx[ac], val);
}
-static const u32 ac_to_mu_edca_param[IEEE80211_NUM_ACS] = {
- [IEEE80211_AC_VO] = R_AX_MUEDCA_VO_PARAM_0,
- [IEEE80211_AC_VI] = R_AX_MUEDCA_VI_PARAM_0,
- [IEEE80211_AC_BE] = R_AX_MUEDCA_BE_PARAM_0,
- [IEEE80211_AC_BK] = R_AX_MUEDCA_BK_PARAM_0,
+#define R_MUEDCA_ACS_PARAM(acs) {R_AX_MUEDCA_ ## acs ## _PARAM_0, \
+ R_BE_MUEDCA_ ## acs ## _PARAM_0}
+
+static const u32 ac_to_mu_edca_param[IEEE80211_NUM_ACS][RTW89_CHIP_GEN_NUM] = {
+ [IEEE80211_AC_VO] = R_MUEDCA_ACS_PARAM(VO),
+ [IEEE80211_AC_VI] = R_MUEDCA_ACS_PARAM(VI),
+ [IEEE80211_AC_BE] = R_MUEDCA_ACS_PARAM(BE),
+ [IEEE80211_AC_BK] = R_MUEDCA_ACS_PARAM(BK),
};
static void ____rtw89_conf_tx_mu_edca(struct rtw89_dev *rtwdev,
@@ -340,6 +343,7 @@ static void ____rtw89_conf_tx_mu_edca(struct rtw89_dev *rtwdev,
{
struct ieee80211_tx_queue_params *params = &rtwvif->tx_params[ac];
struct ieee80211_he_mu_edca_param_ac_rec *mu_edca;
+ int gen = rtwdev->chip->chip_gen;
u8 aifs, aifsn;
u16 timer_32us;
u32 reg;
@@ -356,7 +360,7 @@ static void ____rtw89_conf_tx_mu_edca(struct rtw89_dev *rtwdev,
val = FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_TIMER_MASK, timer_32us) |
FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_CW_MASK, mu_edca->ecw_min_max) |
FIELD_PREP(B_AX_MUEDCA_BE_PARAM_0_AIFS_MASK, aifs);
- reg = rtw89_mac_reg_by_idx(rtwdev, ac_to_mu_edca_param[ac], rtwvif->mac_idx);
+ reg = rtw89_mac_reg_by_idx(rtwdev, ac_to_mu_edca_param[ac][gen], rtwvif->mac_idx);
rtw89_write32(rtwdev, reg, val);
rtw89_mac_set_hw_muedca_ctrl(rtwdev, rtwvif, true);
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 96d5959c299e..d62b3f93b14e 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -3780,6 +3780,11 @@
#define B_BE_P0_SYNC_PORT_SRC_SEL_MASK GENMASK(26, 24)
#define B_BE_P0_TSFTR_SYNC_OFFSET_MASK GENMASK(18, 0)
+#define R_BE_MUEDCA_BE_PARAM_0 0x10350
+#define R_BE_MUEDCA_BK_PARAM_0 0x10354
+#define R_BE_MUEDCA_VI_PARAM_0 0x10358
+#define R_BE_MUEDCA_VO_PARAM_0 0x1035C
+
#define R_BE_MUEDCA_EN 0x10370
#define R_BE_MUEDCA_EN_C1 0x14370
#define B_BE_MUEDCA_WMM_SEL BIT(8)
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 4/6] wifi: rtw89: mac: set bfee_ctrl() according to chip gen
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
` (2 preceding siblings ...)
2023-10-12 2:14 ` [PATCH v2 3/6] wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 5/6] wifi: rtw89: mac: set bf_assoc capabilities " Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 6/6] wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips Ping-Ke Shih
5 siblings, 0 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
From: Zong-Zhe Yang <kevin_yang@realtek.com>
When associated peer has beamformer capability, enable hardware beamformee
function, and then hardware can run sounding protocol itself. Oppositely,
disable this function when disassociated. Define different registers for
WiFi 6 and 7 generations respectively.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac.c | 11 ++++++++---
drivers/net/wireless/realtek/rtw89/mac.h | 1 +
drivers/net/wireless/realtek/rtw89/mac_be.c | 5 +++++
drivers/net/wireless/realtek/rtw89/reg.h | 16 ++++++++++++++++
4 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index d2621f31a78a..b47b3c9be2cb 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -5210,12 +5210,12 @@ static void rtw89_mac_bfee_standby_timer(struct rtw89_dev *rtwdev, u8 mac_idx,
static void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
{
+ const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
u32 reg;
- u32 mask = B_AX_BFMEE_HT_NDPA_EN | B_AX_BFMEE_VHT_NDPA_EN |
- B_AX_BFMEE_HE_NDPA_EN;
+ u32 mask = mac->bfee_ctrl.mask;
rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee ndpa_en to %d\n", en);
- reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
+ reg = rtw89_mac_reg_by_idx(rtwdev, mac->bfee_ctrl.addr, mac_idx);
if (en) {
set_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags);
rtw89_write32_set(rtwdev, reg, mask);
@@ -5759,6 +5759,11 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
.addr = R_AX_MUEDCA_EN,
.mask = B_AX_MUEDCA_EN_0 | B_AX_SET_MUEDCATIMER_TF_0,
},
+ .bfee_ctrl = {
+ .addr = R_AX_BFMEE_RESP_OPTION,
+ .mask = B_AX_BFMEE_HT_NDPA_EN | B_AX_BFMEE_VHT_NDPA_EN |
+ B_AX_BFMEE_HE_NDPA_EN,
+ },
.disable_cpu = rtw89_mac_disable_cpu_ax,
.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 982b357ec6f1..6c043259c5e0 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -862,6 +862,7 @@ struct rtw89_mac_gen_def {
u32 agg_len_ht;
struct rtw89_reg_def muedca_ctrl;
+ struct rtw89_reg_def bfee_ctrl;
void (*disable_cpu)(struct rtw89_dev *rtwdev);
int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index 514cf566eba1..7cf67020c6e6 100644
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -256,6 +256,11 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.addr = R_BE_MUEDCA_EN,
.mask = B_BE_MUEDCA_EN_0 | B_BE_SET_MUEDCATIMER_TF_0,
},
+ .bfee_ctrl = {
+ .addr = R_BE_BFMEE_RESP_OPTION,
+ .mask = B_BE_BFMEE_HT_NDPA_EN | B_BE_BFMEE_VHT_NDPA_EN |
+ B_BE_BFMEE_HE_NDPA_EN | B_BE_BFMEE_EHT_NDPA_EN,
+ },
.disable_cpu = rtw89_mac_disable_cpu_be,
.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index d62b3f93b14e..aee54859f92b 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -3937,6 +3937,22 @@
#define B_BE_UPD_HGQMD BIT(1)
#define B_BE_UPD_TIMIE BIT(0)
+#define R_BE_BFMEE_RESP_OPTION 0x11180
+#define R_BE_BFMEE_RESP_OPTION_C1 0x15180
+#define B_BE_BFMEE_CSI_SEC_TYPE_SH 20
+#define B_BE_BFMEE_CSI_SEC_TYPE_MSK 0xf
+#define B_BE_BFMEE_BFRPT_SEG_SIZE_SH 16
+#define B_BE_BFMEE_BFRPT_SEG_SIZE_MSK 0x3
+#define B_BE_BFMEE_MIMO_EN_SEL BIT(8)
+#define B_BE_BFMEE_MU_BFEE_DIS BIT(7)
+#define B_BE_BFMEE_CHECK_RPTPOLL_MACID_DIS BIT(6)
+#define B_BE_BFMEE_NOCHK_BFPOLL_BMP BIT(5)
+#define B_BE_BFMEE_VHTBFRPT_CHK BIT(4)
+#define B_BE_BFMEE_EHT_NDPA_EN BIT(3)
+#define B_BE_BFMEE_HE_NDPA_EN BIT(2)
+#define B_BE_BFMEE_VHT_NDPA_EN BIT(1)
+#define B_BE_BFMEE_HT_NDPA_EN BIT(0)
+
#define R_BE_RX_FLTR_OPT 0x11420
#define R_BE_RX_FLTR_OPT_C1 0x15420
#define B_BE_UID_FILTER_MASK GENMASK(31, 24)
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 5/6] wifi: rtw89: mac: set bf_assoc capabilities according to chip gen
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
` (3 preceding siblings ...)
2023-10-12 2:14 ` [PATCH v2 4/6] wifi: rtw89: mac: set bfee_ctrl() according to chip gen Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 6/6] wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips Ping-Ke Shih
5 siblings, 0 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
From: Zong-Zhe Yang <kevin_yang@realtek.com>
When associated peer has beamformer capability, we should enable
beamformee, set CSI parameter, and configure rate to send CSI packets.
Since registers of WiFi 7 chips are very different from existing chips,
separate configuration functions.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
v2: correct commit message wording
---
drivers/net/wireless/realtek/rtw89/mac.c | 29 ++--
drivers/net/wireless/realtek/rtw89/mac.h | 15 +-
drivers/net/wireless/realtek/rtw89/mac_be.c | 163 ++++++++++++++++++++
drivers/net/wireless/realtek/rtw89/reg.h | 45 ++++++
4 files changed, 238 insertions(+), 14 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index b47b3c9be2cb..b55f1844f653 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -5208,7 +5208,7 @@ static void rtw89_mac_bfee_standby_timer(struct rtw89_dev *rtwdev, u8 mac_idx,
}
}
-static void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
+void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
{
const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
u32 reg;
@@ -5225,7 +5225,7 @@ static void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en)
}
}
-static int rtw89_mac_init_bfee(struct rtw89_dev *rtwdev, u8 mac_idx)
+static int rtw89_mac_init_bfee_ax(struct rtw89_dev *rtwdev, u8 mac_idx)
{
u32 reg;
u32 val32;
@@ -5267,9 +5267,9 @@ static int rtw89_mac_init_bfee(struct rtw89_dev *rtwdev, u8 mac_idx)
return 0;
}
-static int rtw89_mac_set_csi_para_reg(struct rtw89_dev *rtwdev,
- struct ieee80211_vif *vif,
- struct ieee80211_sta *sta)
+static int rtw89_mac_set_csi_para_reg_ax(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
{
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
u8 mac_idx = rtwvif->mac_idx;
@@ -5325,9 +5325,9 @@ static int rtw89_mac_set_csi_para_reg(struct rtw89_dev *rtwdev,
return 0;
}
-static int rtw89_mac_csi_rrsc(struct rtw89_dev *rtwdev,
- struct ieee80211_vif *vif,
- struct ieee80211_sta *sta)
+static int rtw89_mac_csi_rrsc_ax(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
{
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
u32 rrsc = BIT(RTW89_MAC_BF_RRSC_6M) | BIT(RTW89_MAC_BF_RRSC_24M);
@@ -5364,17 +5364,18 @@ static int rtw89_mac_csi_rrsc(struct rtw89_dev *rtwdev,
return 0;
}
-void rtw89_mac_bf_assoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
- struct ieee80211_sta *sta)
+static void rtw89_mac_bf_assoc_ax(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
{
struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
if (rtw89_sta_has_beamformer_cap(sta)) {
rtw89_debug(rtwdev, RTW89_DBG_BF,
"initialize bfee for new association\n");
- rtw89_mac_init_bfee(rtwdev, rtwvif->mac_idx);
- rtw89_mac_set_csi_para_reg(rtwdev, vif, sta);
- rtw89_mac_csi_rrsc(rtwdev, vif, sta);
+ rtw89_mac_init_bfee_ax(rtwdev, rtwvif->mac_idx);
+ rtw89_mac_set_csi_para_reg_ax(rtwdev, vif, sta);
+ rtw89_mac_csi_rrsc_ax(rtwdev, vif, sta);
}
}
@@ -5765,6 +5766,8 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_ax = {
B_AX_BFMEE_HE_NDPA_EN,
},
+ .bf_assoc = rtw89_mac_bf_assoc_ax,
+
.disable_cpu = rtw89_mac_disable_cpu_ax,
.fwdl_enable_wcpu = rtw89_mac_enable_cpu_ax,
.fwdl_get_status = rtw89_fw_get_rdy_ax,
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 6c043259c5e0..2ddf1f8d0a42 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -864,6 +864,9 @@ struct rtw89_mac_gen_def {
struct rtw89_reg_def muedca_ctrl;
struct rtw89_reg_def bfee_ctrl;
+ void (*bf_assoc)(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta);
+
void (*disable_cpu)(struct rtw89_dev *rtwdev);
int (*fwdl_enable_wcpu)(struct rtw89_dev *rtwdev, u8 boot_reason,
bool dlfw, bool include_bb);
@@ -1038,8 +1041,17 @@ int rtw89_mac_cfg_ctrl_path(struct rtw89_dev *rtwdev, bool wl);
int rtw89_mac_cfg_ctrl_path_v1(struct rtw89_dev *rtwdev, bool wl);
void rtw89_mac_power_mode_change(struct rtw89_dev *rtwdev, bool enter);
void rtw89_mac_notify_wake(struct rtw89_dev *rtwdev);
+
+static inline
void rtw89_mac_bf_assoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
- struct ieee80211_sta *sta);
+ struct ieee80211_sta *sta)
+{
+ const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
+
+ if (mac->bf_assoc)
+ mac->bf_assoc(rtwdev, vif, sta);
+}
+
void rtw89_mac_bf_disassoc(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
struct ieee80211_sta *sta);
void rtw89_mac_bf_set_gid_table(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif,
@@ -1047,6 +1059,7 @@ void rtw89_mac_bf_set_gid_table(struct rtw89_dev *rtwdev, struct ieee80211_vif *
void rtw89_mac_bf_monitor_calc(struct rtw89_dev *rtwdev,
struct ieee80211_sta *sta, bool disconnect);
void _rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev);
+void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en);
int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif);
int rtw89_mac_vif_deinit(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif);
int rtw89_mac_set_hw_muedca_ctrl(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/mac_be.c b/drivers/net/wireless/realtek/rtw89/mac_be.c
index 7cf67020c6e6..3278f241db6e 100644
--- a/drivers/net/wireless/realtek/rtw89/mac_be.c
+++ b/drivers/net/wireless/realtek/rtw89/mac_be.c
@@ -243,6 +243,167 @@ static bool rtw89_mac_get_txpwr_cr_be(struct rtw89_dev *rtwdev,
return true;
}
+static int rtw89_mac_init_bfee_be(struct rtw89_dev *rtwdev, u8 mac_idx)
+{
+ u32 reg;
+ u32 val;
+ int ret;
+
+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
+ if (ret)
+ return ret;
+
+ rtw89_mac_bfee_ctrl(rtwdev, mac_idx, true);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+ rtw89_write32_set(rtwdev, reg, B_BE_BFMEE_BFPARAM_SEL |
+ B_BE_BFMEE_USE_NSTS |
+ B_BE_BFMEE_CSI_GID_SEL |
+ B_BE_BFMEE_CSI_FORCE_RETE_EN);
+ rtw89_write32_mask(rtwdev, reg, B_BE_BFMEE_CSI_RSC_MASK, CSI_RX_BW_CFG);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_CSIRPT_OPTION, mac_idx);
+ rtw89_write32_set(rtwdev, reg, B_BE_CSIPRT_VHTSU_AID_EN |
+ B_BE_CSIPRT_HESU_AID_EN |
+ B_BE_CSIPRT_EHTSU_AID_EN);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_RRSC, mac_idx);
+ rtw89_write32(rtwdev, reg, CSI_RRSC_BMAP_BE);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_1, mac_idx);
+ rtw89_write32_mask(rtwdev, reg, B_BE_BFMEE_BE_CSI_RRSC_BITMAP_MASK,
+ CSI_RRSC_BITMAP_CFG);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_RATE, mac_idx);
+ val = u32_encode_bits(CSI_INIT_RATE_HT, B_BE_BFMEE_HT_CSI_RATE_MASK) |
+ u32_encode_bits(CSI_INIT_RATE_VHT, B_BE_BFMEE_VHT_CSI_RATE_MASK) |
+ u32_encode_bits(CSI_INIT_RATE_HE, B_BE_BFMEE_HE_CSI_RATE_MASK) |
+ u32_encode_bits(CSI_INIT_RATE_EHT, B_BE_BFMEE_EHT_CSI_RATE_MASK);
+
+ rtw89_write32(rtwdev, reg, val);
+
+ return 0;
+}
+
+static int rtw89_mac_set_csi_para_reg_be(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
+ u8 nc = 1, nr = 3, ng = 0, cb = 1, cs = 1, ldpc_en = 1, stbc_en = 1;
+ u8 mac_idx = rtwvif->mac_idx;
+ u8 port_sel = rtwvif->port;
+ u8 sound_dim = 3, t;
+ u8 *phy_cap;
+ u32 reg;
+ u16 val;
+ int ret;
+
+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
+ if (ret)
+ return ret;
+
+ phy_cap = sta->deflink.he_cap.he_cap_elem.phy_cap_info;
+
+ if ((phy_cap[3] & IEEE80211_HE_PHY_CAP3_SU_BEAMFORMER) ||
+ (phy_cap[4] & IEEE80211_HE_PHY_CAP4_MU_BEAMFORMER)) {
+ ldpc_en &= !!(phy_cap[1] & IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD);
+ stbc_en &= !!(phy_cap[2] & IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ);
+ t = u8_get_bits(phy_cap[5],
+ IEEE80211_HE_PHY_CAP5_BEAMFORMEE_NUM_SND_DIM_UNDER_80MHZ_MASK);
+ sound_dim = min(sound_dim, t);
+ }
+
+ if ((sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE) ||
+ (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) {
+ ldpc_en &= !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC);
+ stbc_en &= !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK);
+ t = u32_get_bits(sta->deflink.vht_cap.cap,
+ IEEE80211_VHT_CAP_SOUNDING_DIMENSIONS_MASK);
+ sound_dim = min(sound_dim, t);
+ }
+
+ nc = min(nc, sound_dim);
+ nr = min(nr, sound_dim);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+ rtw89_write32_set(rtwdev, reg, B_BE_BFMEE_BFPARAM_SEL);
+
+ val = u16_encode_bits(nc, B_BE_BFMEE_CSIINFO0_NC_MASK) |
+ u16_encode_bits(nr, B_BE_BFMEE_CSIINFO0_NR_MASK) |
+ u16_encode_bits(ng, B_BE_BFMEE_CSIINFO0_NG_MASK) |
+ u16_encode_bits(cb, B_BE_BFMEE_CSIINFO0_CB_MASK) |
+ u16_encode_bits(cs, B_BE_BFMEE_CSIINFO0_CS_MASK) |
+ u16_encode_bits(ldpc_en, B_BE_BFMEE_CSIINFO0_LDPC_EN) |
+ u16_encode_bits(stbc_en, B_BE_BFMEE_CSIINFO0_STBC_EN);
+
+ if (port_sel == 0)
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_0,
+ mac_idx);
+ else
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_1,
+ mac_idx);
+
+ rtw89_write16(rtwdev, reg, val);
+
+ return 0;
+}
+
+static int rtw89_mac_csi_rrsc_be(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
+ u32 rrsc = BIT(RTW89_MAC_BF_RRSC_6M) | BIT(RTW89_MAC_BF_RRSC_24M);
+ u8 mac_idx = rtwvif->mac_idx;
+ int ret;
+ u32 reg;
+
+ ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL);
+ if (ret)
+ return ret;
+
+ if (sta->deflink.he_cap.has_he) {
+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_HE_MSC0) |
+ BIT(RTW89_MAC_BF_RRSC_HE_MSC3) |
+ BIT(RTW89_MAC_BF_RRSC_HE_MSC5));
+ }
+ if (sta->deflink.vht_cap.vht_supported) {
+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_VHT_MSC0) |
+ BIT(RTW89_MAC_BF_RRSC_VHT_MSC3) |
+ BIT(RTW89_MAC_BF_RRSC_VHT_MSC5));
+ }
+ if (sta->deflink.ht_cap.ht_supported) {
+ rrsc |= (BIT(RTW89_MAC_BF_RRSC_HT_MSC0) |
+ BIT(RTW89_MAC_BF_RRSC_HT_MSC3) |
+ BIT(RTW89_MAC_BF_RRSC_HT_MSC5));
+ }
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_CTRL_0, mac_idx);
+ rtw89_write32_set(rtwdev, reg, B_BE_BFMEE_BFPARAM_SEL);
+ rtw89_write32_clr(rtwdev, reg, B_BE_BFMEE_CSI_FORCE_RETE_EN);
+
+ reg = rtw89_mac_reg_by_idx(rtwdev, R_BE_TRXPTCL_RESP_CSI_RRSC, mac_idx);
+ rtw89_write32(rtwdev, reg, rrsc);
+
+ return 0;
+}
+
+static void rtw89_mac_bf_assoc_be(struct rtw89_dev *rtwdev,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv;
+
+ if (rtw89_sta_has_beamformer_cap(sta)) {
+ rtw89_debug(rtwdev, RTW89_DBG_BF,
+ "initialize bfee for new association\n");
+ rtw89_mac_init_bfee_be(rtwdev, rtwvif->mac_idx);
+ rtw89_mac_set_csi_para_reg_be(rtwdev, vif, sta);
+ rtw89_mac_csi_rrsc_be(rtwdev, vif, sta);
+ }
+}
+
const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
.band1_offset = RTW89_MAC_BE_BAND_REG_OFFSET,
.filter_model_addr = R_BE_FILTER_MODEL_ADDR,
@@ -262,6 +423,8 @@ const struct rtw89_mac_gen_def rtw89_mac_gen_be = {
B_BE_BFMEE_HE_NDPA_EN | B_BE_BFMEE_EHT_NDPA_EN,
},
+ .bf_assoc = rtw89_mac_bf_assoc_be,
+
.disable_cpu = rtw89_mac_disable_cpu_be,
.fwdl_enable_wcpu = rtw89_mac_fwdl_enable_wcpu_be,
.fwdl_get_status = fwdl_get_status_be,
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index aee54859f92b..2bf3c1bed6a2 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -3953,6 +3953,45 @@
#define B_BE_BFMEE_VHT_NDPA_EN BIT(1)
#define B_BE_BFMEE_HT_NDPA_EN BIT(0)
+#define R_BE_TRXPTCL_RESP_CSI_CTRL_0 0x11188
+#define R_BE_TRXPTCL_RESP_CSI_CTRL_0_C1 0x15188
+#define B_BE_BFMEE_CSISEQ_SEL BIT(29)
+#define B_BE_BFMEE_BFPARAM_SEL BIT(28)
+#define B_BE_BFMEE_OFDM_LEN_TH_MASK GENMASK(27, 24)
+#define B_BE_BFMEE_BF_PORT_SEL BIT(23)
+#define B_BE_BFMEE_USE_NSTS BIT(22)
+#define B_BE_BFMEE_CSI_RATE_FB_EN BIT(21)
+#define B_BE_BFMEE_CSI_GID_SEL BIT(20)
+#define B_BE_BFMEE_CSI_RSC_MASK GENMASK(19, 18)
+#define B_BE_BFMEE_CSI_FORCE_RETE_EN BIT(17)
+#define B_BE_BFMEE_CSI_USE_NDPARATE BIT(16)
+#define B_BE_BFMEE_CSI_WITHHTC_EN BIT(15)
+#define B_BE_BFMEE_CSIINFO0_BF_EN BIT(14)
+#define B_BE_BFMEE_CSIINFO0_STBC_EN BIT(13)
+#define B_BE_BFMEE_CSIINFO0_LDPC_EN BIT(12)
+#define B_BE_BFMEE_CSIINFO0_CS_MASK GENMASK(11, 10)
+#define B_BE_BFMEE_CSIINFO0_CB_MASK GENMASK(9, 8)
+#define B_BE_BFMEE_CSIINFO0_NG_MASK GENMASK(7, 6)
+#define B_BE_BFMEE_CSIINFO0_NR_MASK GENMASK(5, 3)
+#define B_BE_BFMEE_CSIINFO0_NC_MASK GENMASK(2, 0)
+#define CSI_RX_BW_CFG 0x1
+#define R_BE_TRXPTCL_RESP_CSI_CTRL_1 0x11194
+#define R_BE_TRXPTCL_RESP_CSI_CTRL_1_C1 0x15194
+#define B_BE_BFMEE_BE_CSI_RRSC_BITMAP_MASK GENMASK(31, 24)
+#define CSI_RRSC_BITMAP_CFG 0x2A
+
+#define R_BE_TRXPTCL_RESP_CSI_RRSC 0x1118C
+#define R_BE_TRXPTCL_RESP_CSI_RRSC_C1 0x1518C
+#define CSI_RRSC_BMAP_BE 0x2A2AFF
+
+#define R_BE_TRXPTCL_RESP_CSI_RATE 0x11190
+#define R_BE_TRXPTCL_RESP_CSI_RATE_C1 0x15190
+#define B_BE_BFMEE_EHT_CSI_RATE_MASK GENMASK(31, 24)
+#define B_BE_BFMEE_HE_CSI_RATE_MASK GENMASK(23, 16)
+#define B_BE_BFMEE_VHT_CSI_RATE_MASK GENMASK(15, 8)
+#define B_BE_BFMEE_HT_CSI_RATE_MASK GENMASK(7, 0)
+#define CSI_INIT_RATE_EHT 0x3
+
#define R_BE_RX_FLTR_OPT 0x11420
#define R_BE_RX_FLTR_OPT_C1 0x15420
#define B_BE_UID_FILTER_MASK GENMASK(31, 24)
@@ -3972,6 +4011,12 @@
#define B_BE_A_A1_MATCH BIT(1)
#define B_BE_SNIFFER_MODE BIT(0)
+#define R_BE_CSIRPT_OPTION 0x11464
+#define R_BE_CSIRPT_OPTION_C1 0x15464
+#define B_BE_CSIPRT_EHTSU_AID_EN BIT(26)
+#define B_BE_CSIPRT_HESU_AID_EN BIT(25)
+#define B_BE_CSIPRT_VHTSU_AID_EN BIT(24)
+
#define R_BE_PWR_MODULE 0x11900
#define R_BE_PWR_MODULE_C1 0x15900
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH v2 6/6] wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
` (4 preceding siblings ...)
2023-10-12 2:14 ` [PATCH v2 5/6] wifi: rtw89: mac: set bf_assoc capabilities " Ping-Ke Shih
@ 2023-10-12 2:14 ` Ping-Ke Shih
5 siblings, 0 replies; 8+ messages in thread
From: Ping-Ke Shih @ 2023-10-12 2:14 UTC (permalink / raw
To: kvalo; +Cc: kevin_yang, linux-wireless
From: Zong-Zhe Yang <kevin_yang@realtek.com>
Beamforming monitor is used to adjust registers to fine tune performance
and power save, and currently only existing WiFi 6 chips need it.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/mac.c | 3 +++
drivers/net/wireless/realtek/rtw89/mac.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/net/wireless/realtek/rtw89/mac.c b/drivers/net/wireless/realtek/rtw89/mac.c
index b55f1844f653..0c5768f41d55 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.c
+++ b/drivers/net/wireless/realtek/rtw89/mac.c
@@ -5195,6 +5195,9 @@ static void rtw89_mac_bfee_standby_timer(struct rtw89_dev *rtwdev, u8 mac_idx,
{
u32 reg;
+ if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)
+ return;
+
rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee standby_timer to %d\n", keep);
reg = rtw89_mac_reg_by_idx(rtwdev, R_AX_BFMEE_RESP_OPTION, mac_idx);
if (keep) {
diff --git a/drivers/net/wireless/realtek/rtw89/mac.h b/drivers/net/wireless/realtek/rtw89/mac.h
index 2ddf1f8d0a42..c11c904f87fe 100644
--- a/drivers/net/wireless/realtek/rtw89/mac.h
+++ b/drivers/net/wireless/realtek/rtw89/mac.h
@@ -1068,6 +1068,9 @@ int rtw89_mac_set_macid_pause(struct rtw89_dev *rtwdev, u8 macid, bool pause);
static inline void rtw89_mac_bf_monitor_track(struct rtw89_dev *rtwdev)
{
+ if (rtwdev->chip->chip_gen != RTW89_CHIP_AX)
+ return;
+
if (!test_bit(RTW89_FLAG_BFEE_MON, rtwdev->flags))
return;
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen
2023-10-12 2:14 ` [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen Ping-Ke Shih
@ 2023-10-14 6:44 ` Kalle Valo
0 siblings, 0 replies; 8+ messages in thread
From: Kalle Valo @ 2023-10-14 6:44 UTC (permalink / raw
To: Ping-Ke Shih; +Cc: kevin_yang, linux-wireless
Ping-Ke Shih <pkshih@realtek.com> wrote:
> From: Zong-Zhe Yang <kevin_yang@realtek.com>
>
> When TX size or time of packet over RTS threshold set by this register,
> hardware will use RTS protection automatically. Since WiFi 6 and 7 chips
> have different register address for this, separate the address according
> to chip gen.
>
> Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
6 patches applied to wireless-next.git, thanks.
fbd1829d2960 wifi: rtw89: mac: update RTS threshold according to chip gen
7f69cd4253c3 wifi: rtw89: mac: generalize register of MU-EDCA switch according to chip gen
79c55327cf24 wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips
5fa1c5d416d5 wifi: rtw89: mac: set bfee_ctrl() according to chip gen
31b7cd195af7 wifi: rtw89: mac: set bf_assoc capabilities according to chip gen
b650981501bf wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips
--
https://patchwork.kernel.org/project/linux-wireless/patch/20231012021455.19816-2-pkshih@realtek.com/
https://wireless.wiki.kernel.org/en/developers/documentation/submittingpatches
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2023-10-14 6:44 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2023-10-12 2:14 [PATCH v2 0/6] wifi: rtw89: generalize MAC registers to support WiFi 7 chips Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 1/6] wifi: rtw89: mac: update RTS threshold according to chip gen Ping-Ke Shih
2023-10-14 6:44 ` Kalle Valo
2023-10-12 2:14 ` [PATCH v2 2/6] wifi: rtw89: mac: generalize register of MU-EDCA switch " Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 3/6] wifi: rtw89: mac: add registers of MU-EDCA parameters for WiFi 7 chips Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 4/6] wifi: rtw89: mac: set bfee_ctrl() according to chip gen Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 5/6] wifi: rtw89: mac: set bf_assoc capabilities " Ping-Ke Shih
2023-10-12 2:14 ` [PATCH v2 6/6] wifi: rtw89: mac: do bf_monitor only if WiFi 6 chips Ping-Ke Shih
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).