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From: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
To: Rob Herring <robh@kernel.org>, Andrew Lunn <andrew@lunn.ch>,
	Gregory Clement <gregory.clement@bootlin.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Walter Harms <wharms@bfs.de>
Cc: linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH v2 3/4] clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
Date: Fri, 30 Jun 2023 23:43:29 +0200	[thread overview]
Message-ID: <09e96a5a-2e02-e832-8fdd-48e9d5e5c3a7@wanadoo.fr> (raw)
In-Reply-To: <20230327-mvebu-clk-fixes-v2-3-8333729ee45d@kernel.org>

Le 09/06/2023 à 20:13, Rob Herring a écrit :
> Rework iterating over DT CPU nodes to iterate over possible CPUs
> instead. There's no need to walk the DT CPU nodes again. Possible CPUs
> is equal to the number of CPUs defined in the DT. Using the "reg" value
> for an array index is fragile as it assumes "reg" is 0-N which often is
> not the case.

Hi,

just for the records, this also fixes 2 bugs that were reported as patch 
1 and 2 at [1].

Nice :)


Part of patch 1 could still have some interest in order to remove the 
hard-coded 5 in the kzalloc().
Patch 3 and 4 are mostly useless.

Feel free to check/apply them if it makes sense to you.

Personaly, I won't bother resending them, unless explicitly requested.


CJ

[1]: 
https://lore.kernel.org/all/cover.1619157996.git.christophe.jaillet@wanadoo.fr/

> 
> Signed-off-by: Rob Herring <robh@kernel.org>
> ---
>   drivers/clk/mvebu/clk-cpu.c | 14 +++-----------
>   1 file changed, 3 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c
> index c2af3395cf13..db2b38c21304 100644
> --- a/drivers/clk/mvebu/clk-cpu.c
> +++ b/drivers/clk/mvebu/clk-cpu.c
> @@ -168,8 +168,8 @@ static void __init of_cpu_clk_setup(struct device_node *node)
>   	struct cpu_clk *cpuclk;
>   	void __iomem *clock_complex_base = of_iomap(node, 0);
>   	void __iomem *pmu_dfs_base = of_iomap(node, 1);
> -	int ncpus = 0;
> -	struct device_node *dn;
> +	int ncpus = num_possible_cpus();
> +	int cpu;
>   
>   	if (clock_complex_base == NULL) {
>   		pr_err("%s: clock-complex base register not set\n",
> @@ -181,9 +181,6 @@ static void __init of_cpu_clk_setup(struct device_node *node)
>   		pr_warn("%s: pmu-dfs base register not set, dynamic frequency scaling not available\n",
>   			__func__);
>   
> -	for_each_of_cpu_node(dn)
> -		ncpus++;
> -
>   	cpuclk = kcalloc(ncpus, sizeof(*cpuclk), GFP_KERNEL);
>   	if (WARN_ON(!cpuclk))
>   		goto cpuclk_out;
> @@ -192,19 +189,14 @@ static void __init of_cpu_clk_setup(struct device_node *node)
>   	if (WARN_ON(!clks))
>   		goto clks_out;
>   
> -	for_each_of_cpu_node(dn) {
> +	for_each_possible_cpu(cpu) {
>   		struct clk_init_data init;
>   		struct clk *clk;
>   		char *clk_name = kzalloc(5, GFP_KERNEL);
> -		int cpu, err;
>   
>   		if (WARN_ON(!clk_name))
>   			goto bail_out;
>   
> -		err = of_property_read_u32(dn, "reg", &cpu);
> -		if (WARN_ON(err))
> -			goto bail_out;
> -
>   		sprintf(clk_name, "cpu%d", cpu);
>   
>   		cpuclk[cpu].parent_name = of_clk_get_parent_name(node, 0);
> 


  parent reply	other threads:[~2023-06-30 21:43 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-09 18:13 [PATCH v2 0/4] clk: Fix/cleanup mvebu CPU DT node accesses Rob Herring
2023-06-09 18:13 ` [PATCH v2 1/4] MAINTAINERS: Add Marvell mvebu clock drivers Rob Herring
2023-06-20 18:57   ` Stephen Boyd
2023-06-09 18:13 ` [PATCH v2 2/4] clk: mvebu: Use of_get_cpu_hwid() to read CPU ID Rob Herring
2023-06-20 18:57   ` Stephen Boyd
2023-06-09 18:13 ` [PATCH v2 3/4] clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes Rob Herring
2023-06-20 18:57   ` Stephen Boyd
2023-06-30 21:43   ` Christophe JAILLET [this message]
2023-06-09 18:13 ` [PATCH v2 4/4] clk: mvebu: Use of_address_to_resource() Rob Herring

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