From: Andrew Lunn <andrew@lunn.ch>
To: Sky Huang <SkyLake.Huang@mediatek.com>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
"David S. Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
Daniel Golle <daniel@makrotopia.org>,
Qingfang Deng <dqfext@gmail.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Steven Liu <Steven.Liu@mediatek.com>
Subject: Re: [PATCH net-next v3 5/5] net: phy: add driver for built-in 2.5G ethernet PHY on MT7988
Date: Mon, 20 May 2024 15:35:30 +0200 [thread overview]
Message-ID: <1158a657-1b95-4d7f-9371-41eec5388441@lunn.ch> (raw)
In-Reply-To: <20240520113456.21675-6-SkyLake.Huang@mediatek.com>
> +static int mt798x_2p5ge_phy_config_init(struct phy_device *phydev)
> +{
> + struct mtk_i2p5ge_phy_priv *priv = phydev->priv;
> + struct device *dev = &phydev->mdio.dev;
> + const struct firmware *fw;
> + struct pinctrl *pinctrl;
> + int ret, i;
> + u16 reg;
> +
> + if (!priv->fw_loaded) {
> + if (!priv->md32_en_cfg_base || !priv->pmb_addr) {
> + dev_err(dev, "MD32_EN_CFG base & PMB addresses aren't valid\n");
> + return -EINVAL;
> + }
...
> +static int mt798x_2p5ge_phy_probe(struct phy_device *phydev)
> +{
> + struct mtk_i2p5ge_phy_priv *priv;
> +
> + priv = devm_kzalloc(&phydev->mdio.dev,
> + sizeof(struct mtk_i2p5ge_phy_priv), GFP_KERNEL);
> + if (!priv)
> + return -ENOMEM;
> +
> + switch (phydev->drv->phy_id) {
> + case MTK_2P5GPHY_ID_MT7988:
> + priv->pmb_addr = ioremap(MT7988_2P5GE_PMB_BASE, MT7988_2P5GE_PMB_LEN);
> + if (!priv->pmb_addr)
> + return -ENOMEM;
> + priv->md32_en_cfg_base = ioremap(MT7988_2P5GE_MD32_EN_CFG_BASE,
> + MT7988_2P5GE_MD32_EN_CFG_LEN);
> + if (!priv->md32_en_cfg_base)
> + return -ENOMEM;
> +
> + /* The original hardware only sets MDIO_DEVS_PMAPMD */
> + phydev->c45_ids.mmds_present |= (MDIO_DEVS_PCS | MDIO_DEVS_AN |
> + MDIO_DEVS_VEND1 | MDIO_DEVS_VEND2);
> + break;
> + default:
> + return -EINVAL;
> + }
How can priv->md32_en_cfg_base or priv->pmb_addr not be set in
mt798x_2p5ge_phy_config_init()
Andrew
next prev parent reply other threads:[~2024-05-20 13:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-20 11:34 [PATCH net-next v3 0/5] net: phy: mediatek: Introduce mtk-phy-lib and add 2.5Gphy support Sky Huang
2024-05-20 11:34 ` [PATCH net-next v3 1/5] net: phy: mediatek: Re-organize MediaTek ethernet phy drivers Sky Huang
2024-05-20 13:08 ` Andrew Lunn
2024-05-20 11:34 ` [PATCH net-next v3 2/5] net: phy: mediatek: Move LED and read/write page helper functions into mtk phy lib Sky Huang
2024-05-20 11:34 ` [PATCH net-next v3 3/5] net: phy: mediatek: Add token ring access helper functions in mtk-phy-lib Sky Huang
2024-05-20 11:34 ` [PATCH net-next v3 4/5] net: phy: mediatek: Extend 1G TX/RX link pulse time Sky Huang
2024-05-20 13:17 ` Andrew Lunn
2024-05-20 11:34 ` [PATCH net-next v3 5/5] net: phy: add driver for built-in 2.5G ethernet PHY on MT7988 Sky Huang
2024-05-20 13:33 ` Andrew Lunn
2024-05-21 9:07 ` SkyLake Huang (黃啟澤)
2024-05-21 17:20 ` Andrew Lunn
2024-05-24 4:38 ` SkyLake Huang (黃啟澤)
2024-05-20 13:35 ` Andrew Lunn [this message]
2024-05-21 8:17 ` SkyLake Huang (黃啟澤)
2024-05-21 17:28 ` Andrew Lunn
2024-05-24 4:44 ` SkyLake Huang (黃啟澤)
2024-05-20 13:06 ` [PATCH net-next v3 0/5] net: phy: mediatek: Introduce mtk-phy-lib and add 2.5Gphy support Andrew Lunn
2024-05-21 9:02 ` Paolo Abeni
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