From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754763AbcBBKMq (ORCPT ); Tue, 2 Feb 2016 05:12:46 -0500 Received: from regular1.263xmail.com ([211.150.99.132]:58613 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754442AbcBBKMn (ORCPT ); Tue, 2 Feb 2016 05:12:43 -0500 X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 X-ADDR-CHECKED: 0 X-RL-SENDER: andy.yan@rock-chips.com X-FST-TO: robh+dt@kernel.org X-SENDER-IP: 58.22.7.114 X-LOGIN-NAME: andy.yan@rock-chips.com X-UNIQUE-TAG: <168e3044c63c0a36764d32c08bd935b3> X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 From: Andy Yan To: robh+dt@kernel.org, arnd@arndb.de, john.stultz@linaro.org Cc: moritz.fischer@ettus.com, matthias.bgg@gmail.com, galak@codeaurora.org, ijc+devicetree@hellion.org.uk, catalin.marinas@arm.com, heiko@sntech.de, sre@kernel.org, dbaryshkov@gmail.com, alexandre.belloni@free-electrons.com, jun.nie@linaro.org, pawel.moll@arm.com, will.deacon@arm.com, linux-rockchip@lists.infradead.org, wxt@rock-chips.com, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux@arm.linux.org.uk, mbrugger@suse.com, linux-arm-kernel@lists.infradead.org, lorenzo.pieralisi@arm.com, linux-kernel@vger.kernel.org, richard@nod.at, dwmw2@infradead.org, mark.rutland@arm.com, Andy Yan Subject: [PATCH v3 3/4] ARM: dts: rockchip: add syscon-reboot-mode DT node Date: Tue, 2 Feb 2016 18:10:37 +0800 Message-Id: <1454407837-5421-1-git-send-email-andy.yan@rock-chips.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1454406981-4692-1-git-send-email-andy.yan@rock-chips.com> References: <1454406981-4692-1-git-send-email-andy.yan@rock-chips.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rockchip platform use a SYSCON mapped register store the reboot mode magic value for bootloader to use when system reboot. So add syscon-reboot-mode driver DT node for rk3xxx,rk3036, rk3288 platform Reviewed-by: Matthias Brugger Signed-off-by: Andy Yan --- Changes in v3: - descirbe all reboot mode as property instead of subnode - add rk3036 support Changes in v2: - make this node as a subnode of PMU Changes in v1: - correct the maskrom magic number - use macro defined in rockchip_boot-mode.h for reboot-mode DT node arch/arm/boot/dts/rk3036.dtsi | 11 +++++++++- arch/arm/boot/dts/rk3288.dtsi | 11 ++++++++++ arch/arm/boot/dts/rk3xxx.dtsi | 13 +++++++++++- include/dt-bindings/soc/rockchip_boot-mode.h | 30 ++++++++++++++++++++++++++++ 4 files changed, 63 insertions(+), 2 deletions(-) create mode 100644 include/dt-bindings/soc/rockchip_boot-mode.h diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index b9567c1..64527c6 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -43,6 +43,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -261,8 +262,16 @@ }; grf: syscon@20008000 { - compatible = "rockchip,rk3036-grf", "syscon"; + compatible = "rockchip,rk3036-grf", "syscon", "simple-mfd"; reg = <0x20008000 0x1000>; + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x1d8>; + mode-normal = ; + mode-recovery = ; + mode-fastboot = ; + mode-loader = ; + }; }; acodec: acodec-ana@20030000 { diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 8ac49f3..4d06d84 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -45,6 +45,7 @@ #include #include #include +#include #include "skeleton.dtsi" / { @@ -713,6 +714,16 @@ clocks = <&cru ACLK_GPU>; }; }; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x94>; + mode-normal = ; + mode-recovery = ; + mode-fastboot = ; + mode-loader = ; + mode-maskrom = ; + }; }; sgrf: syscon@ff740000 { diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 99eeea7..d21ed43 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -43,6 +43,7 @@ #include #include +#include #include "skeleton.dtsi" / { @@ -243,8 +244,18 @@ }; pmu: pmu@20004000 { - compatible = "rockchip,rk3066-pmu", "syscon"; + compatible = "rockchip,rk3066-pmu", "syscon", "simple-mfd"; reg = <0x20004000 0x100>; + + reboot-mode { + compatible = "syscon-reboot-mode"; + offset = <0x40>; + mode-normal = ; + mode-recovery = ; + mode-fastboot = ; + mode-loader = ; + mode-maskrom = ; + }; }; grf: grf@20008000 { diff --git a/include/dt-bindings/soc/rockchip_boot-mode.h b/include/dt-bindings/soc/rockchip_boot-mode.h new file mode 100644 index 0000000..eedf113 --- /dev/null +++ b/include/dt-bindings/soc/rockchip_boot-mode.h @@ -0,0 +1,30 @@ +#ifndef __ROCKCHIP_BOOT_MODE_H +#define __ROCKCHIP_BOOT_MODE_H + +/*high 24 bits is tag, low 8 bits is type*/ +#define REBOOT_FLAG 0x5242C300 +/* normal boot */ +#define BOOT_NORMAL (REBOOT_FLAG + 0) +/* enter loader rockusb mode */ +#define BOOT_LOADER (REBOOT_FLAG + 1) +/* enter maskrom rockusb mode */ +#define BOOT_MASKROM (0xEF08A53C) +/* enter recovery */ +#define BOOT_RECOVERY (REBOOT_FLAG + 3) +/* do not enter recover */ +#define BOOT_NORECOVER (REBOOT_FLAG + 4) +/* boot second OS*/ +#define BOOT_SECONDOS (REBOOT_FLAG + 5) +/* enter recover and wipe data. */ +#define BOOT_WIPEDATA (REBOOT_FLAG + 6) +/* enter recover and wipe all data. */ +#define BOOT_WIPEALL (REBOOT_FLAG + 7) +/* check firmware img with backup part*/ +#define BOOT_CHECKIMG (REBOOT_FLAG + 8) + /* enter fast boot mode */ +#define BOOT_FASTBOOT (REBOOT_FLAG + 9) +#define BOOT_SECUREBOOT_DISABLE (REBOOT_FLAG + 10) +/* enter charge mode */ +#define BOOT_CHARGING (REBOOT_FLAG + 11) + +#endif -- 1.9.1