From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753359AbcAODEJ (ORCPT ); Thu, 14 Jan 2016 22:04:09 -0500 Received: from mail.kernel.org ([198.145.29.136]:46898 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750884AbcAODEH (ORCPT ); Thu, 14 Jan 2016 22:04:07 -0500 Date: Thu, 14 Jan 2016 21:04:00 -0600 From: Rob Herring To: Maxime Ripard Cc: Mike Turquette , Stephen Boyd , David Airlie , Thierry Reding , Philipp Zabel , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com, Laurent Pinchart , Chen-Yu Tsai , Hans de Goede , Alexander Kaplan , Boris Brezillon , Wynter Woods , Thomas Petazzoni , Rob Clark , Daniel Vetter Subject: Re: [PATCH v2 08/26] clk: sun5i: add DRAM gates Message-ID: <20160115030400.GA19274@rob-hp-laptop> References: <1452785109-6172-1-git-send-email-maxime.ripard@free-electrons.com> <1452785109-6172-9-git-send-email-maxime.ripard@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1452785109-6172-9-git-send-email-maxime.ripard@free-electrons.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 14, 2016 at 04:24:51PM +0100, Maxime Ripard wrote: > The Allwinner SoCs have a gate controller to gate the access to the DRAM > clock to the some devices that need to access the DRAM directly (mostly > display / image related IPs). > > Use a simple gates driver to support the one found in the A13 / R8 SoCs. > > Signed-off-by: Maxime Ripard > Acked-by: Chen-Yu Tsai > --- > Documentation/devicetree/bindings/clock/sunxi.txt | 1 + Acked-by: Rob Herring > drivers/clk/sunxi/clk-simple-gates.c | 2 ++ > 2 files changed, 3 insertions(+)