From: Rob Herring <robh@kernel.org>
To: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Mike Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@codeaurora.org>,
David Airlie <airlied@linux.ie>,
Thierry Reding <thierry.reding@gmail.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-sunxi@googlegroups.com,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Chen-Yu Tsai <wens@csie.org>, Hans de Goede <hdegoede@redhat.com>,
Alexander Kaplan <alex@nextthing.co>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Wynter Woods <wynter@nextthing.co>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Rob Clark <robdclark@gmail.com>, Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation
Date: Thu, 14 Jan 2016 21:15:15 -0600 [thread overview]
Message-ID: <20160115031515.GA19797@rob-hp-laptop> (raw)
In-Reply-To: <1452785109-6172-18-git-send-email-maxime.ripard@free-electrons.com>
On Thu, Jan 14, 2016 at 04:25:00PM +0100, Maxime Ripard wrote:
> The display pipeline of the Allwinner A10 is involving several loosely
> coupled components.
>
> Add a documentation for the bindings.
>
> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
> ---
> .../bindings/display/sunxi/sun4i-drm.txt | 228 +++++++++++++++++++++
drm is a linuxism. It shouldn't be used for binding doc.
> 1 file changed, 228 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
>
> diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> new file mode 100644
> index 000000000000..061bc87147a3
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
> @@ -0,0 +1,228 @@
> +Allwinner A10 Display Pipeline
> +==============================
> +
> +The Allwinner A10 Display pipeline is composed of several components
> +that are going to be documented below:
> +
> +TV Encoder
> +----------
> +
> +The TV Encoder supports the composite and VGA output. It is one end of
> +the pipeline.
> +
> +Required properties:
> + - compatible: value should be "allwinner,sun4i-a10-tv-encoder".
> + - reg: base address and size of memory-mapped region
> + - clocks: the clocks driving the TV encoder
> +
> +- ports: A ports node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt. The
> + first port should be the input endpoint.
> +
> +TCON
> +----
> +
> +The TCON acts as a timing controller for RGB, LVDS and TV interfaces.
> +
> +Required properties:
> + - compatible: value should be "allwinner,sun4i-a10-tcon".
> + - reg: base address and size of memory-mapped region
> + - interrupts: interrupt associated to this IP
> + - clocks: phandles to the clocks feeding the TCON. Three are needed:
> + - 'ahb': the interface clocks
> + - 'tcon-ch0': The clock driving the TCON channel 0
> + - 'tcon-ch1': The clock driving the TCON channel 1
> +
> + - clock-names: the clock names mentioned above
> + - clock-output-names: Name of the pixel clock created
> +
> +- ports: A ports node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt. The
> + first port should be the input endpoint, the second one the output
> +
> +Optional properties:
> + - allwinner,panel: phandle to the panel used in our RGB interface
> +
> +
> +Display Engine Backend
> +----------------------
> +
> +The display engine backend exposes layers and sprites to the
> +system.
> +
> +Required properties:
> + - compatible: value must be one of:
> + * allwinner,sun5i-a13-display-backend
> + - reg: base address and size of the memory-mapped region.
> + - clocks: phandles to the clocks feeding the frontend and backend
> + * ahb: the backend interface clock
> + * mod: the backend module clock
> + * ram: the backend DRAM clock
> + - clock-names: the clock names mentioned above
> + - resets: phandles to the reset controllers driving the backend
> +
> +- ports: A ports node with endpoint definitions as defined in
> + Documentation/devicetree/bindings/media/video-interfaces.txt. The
> + first port should be the input endpoints, the second one the output
> +
> +Display Engine Frontend
> +-----------------------
> +
> +The display engine frontend does formats conversion, scaling,
> +deinterlacing and color space conversion.
> +
> +Required properties:
> + - compatible: value must be one of:
> + * allwinner,sun5i-a13-display-frontend
> + - reg: base address and size of the memory-mapped region.
> + - interrupts: interrupt associated to this IP
> + - clocks: phandles to the clocks feeding the frontend and backend
> + * ahb: the backend interface clock
> + * mod: the backend module clock
> + * ram: the backend DRAM clock
should be frontend?
> + - clock-names: the clock names mentioned above
> + - resets: phandles to the reset controllers driving the backend
ditto
> +
> +Display Engine Pipeline
> +-----------------------
> +
> +The display engine pipeline (and its entry point, since it can be
> +either directly the backend or the frontend) is represented as an
> +extra node.
> +
> +Required properties:
> + - compatible: value must be one of:
> + * allwinner,sun5i-a13-display-engine
> + - allwinner,pipelines: list of phandle to the entry points of the
> + pipelines (either to the frontend or backend)
> +
> +Example:
> +
> +panel: panel {
> + compatible = "olimex,lcd-olinuxino-43-ts";
This should either be a child of what it is attached to or use of-graph.
> +};
> +
> +tve0: tv-encoder@01c0a000 {
> + compatible = "allwinner,sun4i-a10-tv-encoder";
> + reg = <0x01c0a000 0x1000>;
> + clocks = <&ahb_gates 34>;
> +
> + port {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + tve0_in_tcon0: endpoint@0 {
> + reg = <0>;
I would drop the reg where you only have 1 node for ports or endpoints.
> + remote-endpoint = <&tcon0_out_tve0>;
> + };
> + };
> +};
> +
> +tcon0: lcd-controller@01c0c000 {
> + compatible = "allwinner,sun4i-a10-tcon";
> + reg = <0x01c0c000 0x1000>;
> + interrupts = <44>;
> + clocks = <&ahb_gates 36>,
> + <&tcon_ch0_clk>,
> + <&tcon_ch1_clk>;
> + clock-names = "ahb",
> + "tcon-ch0",
> + "tcon-ch1";
> + clock-output-names = "tcon-pixel-clock";
> + allwinner,panel = <&panel>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + tcon0_in: port@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + tcon0_in_be0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&be0_out_tcon0>;
> + };
> + };
> +
> + tcon0_out: port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + tcon0_out_tve0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&tve0_in_tcon0>;
> + };
> + };
> + };
> +};
> +
> +fe0: display-frontend@01e00000 {
> + compatible = "allwinner,sun5i-a13-display-frontend";
> + reg = <0x01e00000 0x20000>;
> + interrupts = <47>;
> + clocks = <&ahb_gates 46>, <&de_fe_clk>,
> + <&dram_gates 25>;
> + clock-names = "ahb", "mod",
> + "ram";
> + resets = <&de_fe_clk>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fe0_out: port@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + fe0_out_be0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&be0_in_fe0>;
> + };
> + };
> + };
> +};
> +
> +be0: display-backend@01e60000 {
> + compatible = "allwinner,sun5i-a13-display-backend";
> + reg = <0x01e60000 0x10000>;
> + clocks = <&ahb_gates 44>, <&de_be_clk>,
> + <&dram_gates 26>;
> + clock-names = "ahb", "mod",
> + "ram";
> + resets = <&de_be_clk>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + be0_in: port@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + be0_in_fe0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&fe0_out_be0>;
> + };
> + };
> +
> + be0_out: port@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + be0_out_tcon0: endpoint@0 {
> + reg = <0>;
> + remote-endpoint = <&tcon0_in_be0>;
> + };
> + };
> +};
> +
> +display-engine {
> + compatible = "allwinner,sun5i-a13-display-engine";
> + pipelines = <&be0>;
> +};
> --
> 2.6.4
>
> --
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next prev parent reply other threads:[~2016-01-15 3:15 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-14 15:24 [PATCH v2 00/26] drm: Add Allwinner A10 display engine support Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 01/26] reset: Move DT cell size check to the core Maxime Ripard
2016-01-15 15:50 ` Philipp Zabel
2016-01-14 15:24 ` [PATCH v2 02/26] reset: Make reset_control_ops const Maxime Ripard
2016-01-15 15:50 ` Philipp Zabel
2016-01-14 15:24 ` [PATCH v2 03/26] clk: Add regmap support Maxime Ripard
2016-01-28 7:56 ` Stephen Boyd
2016-01-14 15:24 ` [PATCH v2 04/26] clk: composite: Add unregister function Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 05/26] clk: sunxi: Add display and TCON0 clocks driver Maxime Ripard
2016-01-15 3:01 ` Rob Herring
2016-01-16 14:08 ` [linux-sunxi] " Priit Laes
2016-01-16 15:29 ` Chen-Yu Tsai
2016-02-03 20:18 ` Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 06/26] clk: sunxi: Add PLL3 clock Maxime Ripard
2016-01-15 3:02 ` Rob Herring
2016-01-16 16:05 ` Chen-Yu Tsai
2016-02-03 20:27 ` Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 07/26] clk: sunxi: Add TCON channel1 clock Maxime Ripard
2016-01-15 3:03 ` Rob Herring
2016-01-16 16:36 ` Chen-Yu Tsai
2016-02-03 20:29 ` Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 08/26] clk: sun5i: add DRAM gates Maxime Ripard
2016-01-15 3:04 ` Rob Herring
2016-01-14 15:24 ` [PATCH v2 09/26] ARM: sun5i: dt: Add pll3 and pll7 clocks Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 10/26] ARM: sun5i: a13: Add display and TCON clocks Maxime Ripard
2016-01-16 17:06 ` Chen-Yu Tsai
2016-02-03 20:31 ` Maxime Ripard
2016-02-05 9:49 ` Chen-Yu Tsai
2016-01-14 15:24 ` [PATCH v2 11/26] ARM: sun5i: Add DRAM gates Maxime Ripard
2016-01-16 17:10 ` Chen-Yu Tsai
2016-02-03 20:36 ` Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 12/26] ARM: sun5i: Add TV encoder gate to the DTSI Maxime Ripard
2016-01-16 17:12 ` Chen-Yu Tsai
2016-01-14 15:24 ` [PATCH v2 13/26] drm/fb_cma_helper: Remove implicit call to disable_unused_functions Maxime Ripard
2016-01-14 23:13 ` Laurent Pinchart
2016-01-15 10:17 ` Daniel Vetter
2016-01-24 22:19 ` Laurent Pinchart
2016-01-25 7:29 ` Daniel Vetter
2016-01-25 19:02 ` Laurent Pinchart
2016-01-14 15:24 ` [PATCH v2 14/26] drm/modes: Rewrite the command line parser Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 15/26] drm/modes: Support modes names on the command line Maxime Ripard
2016-01-14 15:24 ` [PATCH v2 16/26] drm: Add Allwinner A10 Display Engine support Maxime Ripard
2016-01-16 15:11 ` [linux-sunxi] " Priit Laes
2016-01-17 12:58 ` Priit Laes
2016-01-19 15:38 ` Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 17/26] drm: sun4i: Add DT bindings documentation Maxime Ripard
2016-01-15 3:15 ` Rob Herring [this message]
2016-02-03 19:59 ` Maxime Ripard
2016-02-03 20:19 ` Rob Herring
2016-02-03 20:47 ` Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 18/26] drm: sun4i: Add RGB output Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 19/26] drm: sun4i: Add composite output Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 20/26] drm: sun4i: tv: Add PAL output standard Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 21/26] drm: sun4i: tv: Add NTSC " Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 22/26] ARM: sun5i: r8: Add display blocks to the DTSI Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 23/26] ARM: sun5i: chip: Enable the TV Encoder Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 24/26] devicetree: Add olimex vendor prefix Maxime Ripard
2016-01-15 3:15 ` Rob Herring
2016-01-15 6:41 ` Stefan Wahren
2016-01-15 8:05 ` Maxime Ripard
2016-01-14 15:25 ` [PATCH v2 25/26] drm/panel: simple: Add timings for the Olimex LCD-OLinuXino-4.3TS Maxime Ripard
2016-01-15 3:17 ` Rob Herring
2016-01-14 15:25 ` [PATCH v2 26/26] DO NOT MERGE: ARM: sun5i: chip: Enable the LCD panel Maxime Ripard
2016-02-20 13:45 ` [linux-sunxi] [PATCH v2 00/26] drm: Add Allwinner A10 display engine support Priit Laes
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