From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754238AbcCAOnu (ORCPT ); Tue, 1 Mar 2016 09:43:50 -0500 Received: from mail.kernel.org ([198.145.29.136]:60279 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754053AbcCAOnr (ORCPT ); Tue, 1 Mar 2016 09:43:47 -0500 Date: Tue, 1 Mar 2016 08:43:36 -0600 From: Bjorn Helgaas To: Kishon Vijay Abraham I Cc: Paul Walmsley , Sekhar Nori , Suman Anna , d-gerlach@ti.com, Tony Lindgren , Bjorn Helgaas , richardcochran@gmail.com, Russell King , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 3/3] pci: dra7xx: use pdata callbacks to perform reset Message-ID: <20160301144335.GA11916@localhost> References: <56BE1454.3030002@ti.com> <56C5D377.50901@ti.com> <56CAA82D.6000507@ti.com> <56CADB23.8020202@ti.com> <56CC490F.3040301@ti.com> <56CD4BE1.3010701@ti.com> <56D5834C.5030800@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <56D5834C.5030800@ti.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 01, 2016 at 05:25:56PM +0530, Kishon Vijay Abraham I wrote: > Hi, > > On Tuesday 01 March 2016 01:55 PM, Paul Walmsley wrote: > > > > Folks, the following is what I've queued for this. > > Thanks Paul. > > Bjorn, > > With this patch merged, enabling pci-dra7xx won't result in system freeze > anymore. I can send a patch to revert depends on BROKEN. Great! Please send me that patch, and I'll merge it for v4.6. > > From: Sekhar Nori > > Date: Thu, 18 Feb 2016 16:49:56 +0530 > > Subject: [PATCH] ARM: DRA7: hwmod: Add custom reset handler for PCIeSS > > > > Add a custom reset handler for DRA7x PCIeSS. This > > handler is required to deassert PCIe hardreset lines > > after they have been asserted. > > > > This enables the PCIe driver to access registers after > > PCIeSS has been runtime enabled without having to > > deassert hardreset lines itself. > > > > With this patch applied, used lspci to make sure > > connected PCIe device enumerates on DRA74x and DRA72x > > EVMs. > > > > Signed-off-by: Sekhar Nori > > Reported-by: Richard Cochran > > Tested-by: Kishon Vijay Abraham I > > Cc: Suman Anna > > Cc: Dave Gerlach > > Cc: Tony Lindgren > > Cc: Bjorn Helgaas > > Cc: Russell King > > Signed-off-by: Paul Walmsley > > --- > > arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 23 +++++++++++++++++++++++ > > 1 file changed, 23 insertions(+) > > > > diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > > index b61355e2a771..252b74633e31 100644 > > --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > > +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c > > @@ -1526,8 +1526,31 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = { > > * > > */ > > > > +/* > > + * As noted in documentation for _reset() in omap_hwmod.c, the stock reset > > + * functionality of OMAP HWMOD layer does not deassert the hardreset lines > > + * associated with an IP automatically leaving the driver to handle that > > + * by itself. This does not work for PCIeSS which needs the reset lines > > + * deasserted for the driver to start accessing registers. > > + * > > + * We use a PCIeSS HWMOD class specific reset handler to deassert the hardreset > > + * lines after asserting them. > > + */ > > +static int dra7xx_pciess_reset(struct omap_hwmod *oh) > > +{ > > + int i; > > + > > + for (i = 0; i < oh->rst_lines_cnt; i++) { > > + omap_hwmod_assert_hardreset(oh, oh->rst_lines[i].name); > > + omap_hwmod_deassert_hardreset(oh, oh->rst_lines[i].name); > > + } > > + > > + return 0; > > +} > > + > > static struct omap_hwmod_class dra7xx_pciess_hwmod_class = { > > .name = "pcie", > > + .reset = dra7xx_pciess_reset, > > }; > > > > /* pcie1 */ > >